Recent developments in high integration multi-standard CMOS transceivers for personal communication systems

Rudell, Jacques C.; Ou, Jia-Jiunn; Narayanaswami, Ranga; Chien, George; Weldon, Jeffrey A.; Liu, Lin; Tsai, King-Chun; Tee, Luns; Khoo, Kelvin Boo-Huat; Au, D.; Robinson, Thompson G.; Gerna, D.; Otsuka, M.; Gray, P.R.

doi:10.1145/280756.280868

Cited by 32 publications

(5 citation statements)

References 13 publications

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“…Voltage-controlled oscillator (VCO) plays an ultra important role in radio frequency (RF) systems such as frequency synthesizer. It determines the performance of the whole system since it provides a reference signal by which complex functions are controlled [1]. In wireless communication systems, a steady reference is needed to enable synchronization and carrier recovery between transmitter and receiver modules.…”

Section: 1thesis Overviewmentioning

confidence: 99%

Gm-enhanced differential colpitts VCO

Xiao

Goh

et al. 2011

2011 International Symposium on Integrated Circuits

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V AbstractThis thesis proposes a gm-enhanced differential Colpitts voltage-control oscillator (VCO) that initiates oscillation with a lower biasing current and exhibits a better phase noise performance. The proposed gm-enhanced topology can improve performance of VCO, whereby the oscillator constructed based on the suggested topology demonstrated operation from 1.53 GHz to 2.1 GHz. The tank inductors engaged in the oscillator are each designed with a quality factor of 9. To evaluate the design, a conventional cross-coupled differential LC VCO, a conventional differential Colpitts VCO and the proposed VCO are simulated using 1.5 V supply voltage, under the 0.13 μm standard CMOS process. Biased with a current of 3 mA, the simulation results show that the proposed VCO's phase noise performance is of -128.9 dBc/Hz at 1 MHz offset, which is 3.6 dBc/Hz better than that of the cross-coupled differential LC VCO and 2 dBc/Hz better than that of the conventional differential Colpitts VCO. In the post-layout simulations of the proposed VCO and conventional cross-coupled differential LC VCO, the former has a 2.1 dBc/Hz phase noise better than that of the conventional one.Based on the developed designed gm-enhanced topology, a gm-enhanced differential Colpiits Quadrature VCO (QVCO) is designed. Operating at 1.8 GHz, the proposed QVCO shows a phase noise of -132.4 dBc/Hz at 1-MHz offset, when biased with 4-mA current and 1.5 V supply voltage. Compared with the conventional Colpitts QVCO, the proposed gm-enhanced differential Colpiits QVCO demonstrates better phase noise of 4 dB under the same operating condition.

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Section: 1thesis Overviewmentioning

confidence: 99%

Gm-enhanced differential colpitts VCO

Xiao

Goh

et al. 2011

2011 International Symposium on Integrated Circuits

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“…Recent research activities have demonstrated the potential for increasing the level of integration of various RF subsystems into the same IC [1][2][3][4][5][6][7].…”

Section: Introductionmentioning

confidence: 99%

Passive On‐Chip Components for Fully Integrated Silicon RF VCOs

Kyranas

Papananos

2000

Active and Passive Electronic Components

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In this work integrated passive devices used in RF VCOs are presented. The operation of on-chip inductors and variable capacitors is outlined along with simple electrical equivalent circuits suitable for hand calculations. Design examples of passive devices operating at 5 and 6 GHz in a commercial HBT BiCMOS process are also presented. The parallel resonator quality factor is computed as a function of inductor L capacitor C and their respective losses R SL and R SC .

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“…Interestingly, the location of this spike is highly correlated to the signal strength. 2 Nevertheless, any noise outside of the baseband does not affect the performance of the converter. As the oversampling ratio of the converter is varied, different noise sources dominate the performance obtained from the delta-sigma mode converter.…”

Section: Delta-sigma Modementioning

confidence: 99%

“…Communications Another sought-after feature of a communication device is the possibility of adapting the performance of its electronics ti the surrounding conditions. Sensitivity and selectivity [2] are two features of a communication device that can be tuned. If this communication device is in close proximity to its basestation, its sensitivity and hence the signal-to-noise ratio of the converter can be reduced leading to reduced power.…”

Section: Introductionmentioning

confidence: 99%

“…Reducing supply voltages, on the other hand, forces reconsideration in favor of the folded-cascode, or in the extreme case, the 2-stage design. Although a telescopic opamp without the tail current source [49] (Figure A-ld) improves the differential swing by 2 Vdssat + 2 Vmargin (600mV), the common-mode rejection and power supply rejection of such a circuit is greatly compromised. Moreover, the performance parameters (such as unity-gain frequency and settling time) of an opamp with no tail or with a tail transistor in the linear region is sensitive to input common-mode and supply voltage variation which is undesirable in most analog systems.…”

Section: A1 Introductionmentioning

confidence: 99%

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A low-power reconfigurable analog-to-digital converter

Gulati¹,

Lee²

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)

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This thesis presents the concept, theory and design of a low power CMOS analog-to-digital converter that can digitize signals over a wide range of bandwidth and resolution with adaptive power consumption. The converter achieves the wide operating range by reconfiguring (1) its architecture between pipeline and delta-sigma modes (2) by varying its circuit parameters such as size of capacitors, length of pipeline, oversampling ratio, among others and (3) by varying the bias currents of the opamps in proportion with converter sampling frequency, accomplished through the use of a phase-locked loop. Target input signals for this ADC include high frequency and moderate resolution signals such as video and low I.F. in radio Receivers, low frequency and high resolution signals from seismic sensors and MEMs devices, and others that fall in between these extremes such as audio, voice and general purpose data-acquisition. This converter also incorporates several power reducing features such as thermal noise limited design, global converter chopping in the pipeline mode, opamp scaling, opamp sharing between consecutive stages in the pipeline mode, an opamp chopping technique in the delta-sigma mode, and other design techniques. The opamp chopping technique achieves faster closed-loop settling time and lower thermal noise than conventional design.At a converter power supply at 3.3V, the converter achieves a bandwidth range of 0-10MHz over a resolution range of 6 -16 bits, and parameter reconfiguration time of 12 clock cycles. Its PLL lock range is measured at 20KHz to 40MHz. In the delta-sigma mode, it achieves a maximum SNR of 94dB and second and third harmonic distortions of 102dB and 95dB, respectively at 10MHz clock frequency, 9.4KHz bandwidth, and 17.6mW power. In the pipeline mode, it achieves a maximum DNL and INL of +/-0.55LSBs and +/-0. 82LSBs, respectively, at 11-bits of resolution, at a clock frequency of 2.6MHz and 1MHz tone with 24.6mW of power.

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Recent developments in high integration multi-standard CMOS transceivers for personal communication systems

Cited by 32 publications

References 13 publications

Gm-enhanced differential colpitts VCO

Gm-enhanced differential colpitts VCO

Passive On‐Chip Components for Fully Integrated Silicon RF VCOs

A low-power reconfigurable analog-to-digital converter

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