RD53 Collaboration and CHIPIX65 Project for the development of an innovative Pixel Front End Chip for HL-LHC

Abstract

Pixel detectors at HL-LHC experiments will be exposed to unprecedented level of radiation and particle flux. This paper describes the program of development of an innovative pixel chip using a CMOS 65nm technology for the first time in HEP community, for experiments with extreme particle rates and radiation at future High Energy Physics colliders. The RD53 collaboration effort is described together with the CHIPIX65 INFN project.

Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

“…The CERN RD53 collaboration [1][2][3][4] was constituted in 2013 with the purpose to develop pixel readout Integrated Circuits (IC) for the next generation of pixel readout chips to be used for the ATLAS and CMS Phase 2 pixel detector upgrades and future CLIC pixel detectors. The IC challenges include: smaller pixels to resolve tracks in boosted jets, very high hit rates due to unprecedented particle fluence, much higher output bandwidth, radiation and large IC format with low power consumption in order to instrument large areas while keeping the material budget low.…”

First measurements of a prototype of a new generation pixel readout ASIC in 65 nm CMOS for extreme rate HEP detectors at HL-LHC

“…Much R&D work is on-going on the design of new pixel frontend ASIC and significant progress has already been made [1]. This paper will describe a innovative pixel ASIC with a matrix of 64×64 pixels each of dimension 50×50 µm 2 , designed by the CHIPIX65 project [2], [3] as a demonstrator of a next generation chip for the Pixel Phase 2 Upgrade, complying with high radiation doses, providing extreme data rates with a compact design, low power consumption and working with low thresholds (below 1000 e − ). All the IP-blocks and the analogue front-ends were developed by the CHIPIX65 project and in the framework of the RD53 Collaboration [4], [5].…”

Development of Detectors for Physics at the Terascale

“…This seems manageable with the first prototypes developed by the CERN RD53 Collaboration in the 65 nm TSMC technology. 6 Higher radiation hardness for the innermost pixel layer can be achieved by 3D sensors, where the lateral depletion requires a significantly smaller bias voltage to achieve the complete depletion and a high electric field for fast charge collection. Ref.…”