1991
DOI: 10.1109/54.82036
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Rapid prototyping of high-speed communications chips

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1991
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Cited by 6 publications
(2 citation statements)
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“…Symbolic circuit extraction is also employed to permit accurate transistor-level timing simulations without resorting to slower conventional mask-level extraction. These techniques have combined to layout system [ 1,2,3]. This approach provides technology insensitivity and makes it easy for designers to add new, highly functional cells to the library.…”
Section: Infroductionmentioning
confidence: 98%
See 1 more Smart Citation
“…Symbolic circuit extraction is also employed to permit accurate transistor-level timing simulations without resorting to slower conventional mask-level extraction. These techniques have combined to layout system [ 1,2,3]. This approach provides technology insensitivity and makes it easy for designers to add new, highly functional cells to the library.…”
Section: Infroductionmentioning
confidence: 98%
“…This approach is notable for employing a cell library that is symbolic, so that cells are compacted with a virtual grid compactor and pitchmatcher for a chosen technology at the time of constructing a particular design [2,3]. This approach provides for technology insensitivity, ease of library cell creation and high cell performance.…”
Section: Infroductionmentioning
confidence: 99%