Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution

Bhunia, Swarup; Abramovici, M.; Agrawal, Dakshi; Bradley, P.; Hsiao, Michael S.; Plusquellic, Jim; Tehranipoor, Mohammad

doi:10.1109/mdt.2012.2196252

Cited by 113 publications

(63 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It is also easier to implant hardware Trojans into devices that adopt such lightweight algorithms because these devices are normally used in RFID system and composed of sorts of IPs, and they are typically designed and manufactured by offshore design houses or foundries. In theory, any parties involving into the design or manufacturing stages can make alterations in the circuits for malicious purpose [15], and thus these circuits are more vulnerable to algebraic fault attacks which inject faults by triggering HT.…”

Section: Motivationmentioning

confidence: 99%

“…They can be implemented as hardware modifications to ASICs, commercial-off-the-shelf (COTS) parts, microprocessors, microcontrollers, network processors, or digitalsignal processors (DSPs) and can also be implemented as firmware modifications to, for example, FPGA bitstreams [12]. An adversary is expected to make a Trojan stealthy in nature, that is, to evade detection by methods such as postmanufacturing test, optical inspection, or side-channel analysis [13][14][15]. Due to outsourcing trend of the semiconductor design and fabrication, hardware Trojan attacks have emerged as a major security concern for integrated circuits (ICs) [13].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Stealthy Hardware Trojan Based Algebraic Fault Analysis of HIGHT Block Cipher

Chen

Wang

Zhang

et al. 2017

Security and Communication Networks

View full text Add to dashboard Cite

HIGHT is a lightweight block cipher which has been adopted as a standard block cipher. In this paper, we present a bit-level algebraic fault analysis (AFA) of HIGHT, where the faults are perturbed by a stealthy HT. The fault model in our attack assumes that the adversary is able to insert a HT that flips a specific bit of a certain intermediate word of the cipher once the HT is activated. The HT is realized by merely 4 registers and with an extremely low activation rate of about 0.000025. We show that the optimal location for inserting the designed HT can be efficiently determined by AFA in advance. Finally, a method is proposed to represent the cipher and the injected faults with a merged set of algebraic equations and the master key can be recovered by solving the merged equation system with an SAT solver. Our attack, which fully recovers the secret master key of the cipher in 12572.26 seconds, requires three times of activation on the designed HT. To the best of our knowledge, this is the first Trojan attack on HIGHT.

show abstract

Section: Motivationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Stealthy Hardware Trojan Based Algebraic Fault Analysis of HIGHT Block Cipher

Chen

Wang

Zhang

et al. 2017

Security and Communication Networks

View full text Add to dashboard Cite

show abstract

“…With that challenge in mind, one particularly aspiring solution towards trustworthy chips are hardware monitors or wrappers for the continuous and pervasive control of untrusted and/or security-critical components [129], [130], [139], [148], [149], [150], [151]. The moment such monitors/wrappers observe some malicious behaviour, i.e., any behavioural anomaly with respect to well-defined, "normal" patterns (which may also be re-programmed if need arises), the related components are overridden or isolated.…”

Section: Runtime Attacks and Hardware Monitorsmentioning

confidence: 99%

Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration

Knechtel

Sinanoglu

Elfadel

et al. 2017

IPSJ Transactions on System LSI Design Methodology

View full text Add to dashboard Cite

Three-dimensional (3D) integration of electronic chips has been advocated by both industry and academia for many years. It is acknowledged as one of the most promising approaches to meet ever-increasing demands on performance, functionality, and power consumption. Furthermore, 3D integration has been shown to be most effective and efficient once large-scale integration is targeted for. However, a multitude of challenges has thus far obstructed the mainstream transition from "classical 2D chips" to such large-scale 3D chips. In this paper, we survey all popular 3D integration options available and advocate that using an interposer as system-level integration backbone would be the most practical for large-scale industrial applications and design reuse. We review major design (automation) challenges and related promising solutions for interposer-based 3D chips in particular, among the other 3D options. Thereby we outline (i) the need for a unified workflow, especially once full-custom design is considered, (ii) the current design-automation solutions and future prospects for both classical (digital) and advanced (heterogeneous) interposer stacks, (iii) the state-of-art and open challenges for testing of 3D chips, and (iv) the challenges of securing hardware in general and the prospects for large-scale and trustworthy 3D chips in particular.

show abstract

“…These rogue components will either disable the IC, cause it to behave differently or allow stealing information under specific conditions that will not happen during standard simulations and post-manufacturing tests. This type of attack is termed hardware Trojan [58,[65][66][67][68][69][70][71][72][73].…”

Section: Types Of Attacksmentioning

confidence: 99%

“…A method against timing attack is to make all operations take the same amount of time [45,68], but this is clearly at the cost of efficiency. Another technique with less negative impact on performance and also used against electromagnetic leakage is to blind, i.e.…”

Section: Types Of Attacksmentioning

confidence: 99%

Uniquely Identifiable Tamper-Evident Device Using Coupling between Subwavelength Gratings

Fièvre¹

View full text Add to dashboard Cite

Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution

Cited by 113 publications

References 11 publications

Stealthy Hardware Trojan Based Algebraic Fault Analysis of HIGHT Block Cipher

Stealthy Hardware Trojan Based Algebraic Fault Analysis of HIGHT Block Cipher

Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration

Uniquely Identifiable Tamper-Evident Device Using Coupling between Subwavelength Gratings

Contact Info

Product

Resources

About