Pre‐Fabrication Gettering and Hydrogenation Treatments for Silicon Heterojunction Solar Cells: A Possible Path to >700 mV Open‐Circuit Voltages Using Low‐Lifetime Commercial‐Grade p‐Type Czochralski Silicon

Abstract

Pre-fabrication gettering and bulk hydrogenation processes are applied to lowbulk-lifetime (25 μs) p-type Czochralski silicon wafers before silicon heterojunction (SHJ) solar cell fabrication, resulting in effective minority carrier lifetime enhancements by a factor of six. On complete SHJ solar cells, this translates to an improvement in the open-circuit voltage (V OC ) of 71 mV, resulting in V OC values as high as 692 mV. This remarkably high V OC suggests that efficiencies approaching 25% could be possible for low-cost p-type Czochralski silicon wafersnot the typical expensive, high-quality n-type ones with lifetimes of several millisecondsin the near future. This method is also likely applicable to n-type SHJ solar cells to reduce the incoming wafer lifetime requirements and to other silicon solar cell structures featuring passivated contacts.Hydrogenated amorphous silicon (a-Si:H) thin films provide excellent surface passivation of crystalline silicon wafers. [1] This has enabled open-circuit voltages (V OC ) of 750 mV in silicon heterojunction (SHJ) solar cells [2] and resulted in multiple worldrecord efficiencies of over 25%, [3,4] with a current record of more than 26.6% using an interdigitated back-contact structure. [4] One attributed strength of the SHJ technology is the ability to fabricate cells at temperatures below 250 C to reduce processing costs and avoid "poisoning" the silicon bulk during high-temperature processes. [5,6] However, the exclusive use of low processing temperatureswhich is required because of the loss of hydrogen from the a-Si: H films at higher temperatureseliminates the possibility of improving the quality of the silicon bulk throughout the cell fabrication sequence with gettering and hydrogenation. This is primarily due to the low diffusion coefficients of impurities including hydrogen and iron at such temperatures. [7,8] As a result, to take full advantage of the excellent surface passivation offered by SHJ structures, highquality n-type Czochralski (Cz), or float-zone silicon wafers with millisecond starting lifetimes are required to make high-efficiency solar cells. [7] This strict wafer-lifetime requirement increases the solar cell production cost and limits SHJ cells to premium markets.To broaden the application of SHJ structures and reduce the high materials cost of n-type silicon wafers, p-type Cz silicon wafers could be used. In fact, p-type Cz wafers can have bulk lifetimes of over 1 ms [9] and can be used to fabricate solar cells with V OC s of up to 730 mV. [10] However, the commercial-grade p-type Cz wafers used for mass production of aluminium back-surface field (Al-BSF) and passivated emitter and rear cell (PERC) structures often have much lower lifetimes (below 200 ms), which lead to substantially lower V OC and efficiency values than those of their n-type counterparts. Despite these poor lifetimes, cells fabricated from these wafers have demonstrated V OC s of approximately 686 mVand record efficiencies of 22.7% using the PERC cell technology.

Improvement of Surface Passivation of Tunnel Oxide Passivated Contact Structure by Thermal Annealing in Mixture of Water Vapor and Nitrogen Environment

“…The difference in forming gas and pure nitrogen is the 10% hydrogen in this experiment. Hydrogenation is a very well‐developed method to passivate defects in c‐Si solar cells and widely used for curing the light and elevated temperature–induced degradation in c‐Si solar cells . Because water molecules contain hydrogen atoms and the humidity in the laboratory was about 55%, we speculate that the increment in the iV oc after the annealing in the air could have resulted from the moisture in the air.…”

“…After the 820 °C annealing, the TOPCon structure provides significant passivation with the iV oc of 705 mV and the J 0 of 14.9 fA cm −2 at the minority carrier density (MCD) of 1 × 10 15 cm −3 . A few things happen during the annealing: 1) the a‐Si:H is crystallized into poly‐Si as proven by UV‐Raman measurements, 2) the P atoms are activated into dopants as measured by electrochemical voltage (ECV) measurements to provide free carriers and the field‐effect passivation, 3) Si‐H bonds are broken and H diffuses out or diffuses into the c‐Si, 4) the SiO x restructures and pin‐holes could form, and 5) P diffuses through the SiO x into the c‐Si as measured by ECV measurement as well . All of these could affect the passivation quality, but we found the improved field‐effect passivation as the dominating factor to determine the passivation quality, because a undoped poly‐Si made from an intrinsic a‐Si:H precursor itself shows a much lower passivation improvement than with the n‐poly‐Si from a P‐doped a‐Si:H precursor .…”

Large‐Area Boron‐Doped 1.6 Ω cm p‐Type Czochralski Silicon Heterojunction Solar Cells with a Stable Open‐Circuit Voltage of 736 mV and Efficiency of 22.0%

“…It is important to note that with the addition of a dedicated gettering step to improve material quality, Descoeudres et al observed an efficiency gain of %0.2% abs in batches of p-type SHJ solar cells. [10] In previous studies, we have also demonstrated the role of gettering in increasing the lifetime of p-type Cz silicon, [5,11,12] which translated to a %1% abs increase in the efficiency of SHJ solar cells. These results together indicate the need for gettering as a defect-engineering process to enhance the quality of p-type silicon wafers for SHJ solar cells applications.…”

“…[3] Thus, silicon wafers used for SHJ solar cells do not benefit from the gettering of metallic impurities and hydrogenation of bulk defects that are naturally incorporated in the fabrication sequence of aluminum back surface field (Al-BSF) and passivated emitter and rear cell (PERC) solar cells. [4,5] Therefore, highquality n-type Czochralski (Cz) silicon with bulk lifetimes (τ bulk ) > 1 ms is required in the fabrication of SHJ solar cells. [6,7] Although there have been cost reductions on n-type Cz silicon over the last 10 years, p-type Cz silicon is still 8% cheaper than n-type Cz (at a thickness of 180 μm).…”

High temperature oxidation pre-treatment of textured c-Si wafers passivated by a-Si:H

“…A similar approach has been developed in Ref. [14], with gettering and hydrogenation of the wafer through SiN x layer and rapid thermal firing. We investigate the passivation quality of double-side textured wafers treated with HTO for variable treatment time by passivating the c-Si surfaces with a-Si:H layers growth via plasma enhanced chemical vapor deposition (PECVD).…”