Practical placement and routing techniques for analog circuit designs

Abstract

Abstract-1 In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering during the placement step. Symmetric routing will then be performed. In order to have successful routing, we will perform analog-based routability-driven adjustment during the placement process, taking into account for analog circuits that wires are not preferred to be layout on top of active devices. All these concepts were put together in our tool. Experimental results show that we can generate quality analog layout within minutes of time that passes the design rule check, layout-schematic verification and the simulation results are comparable with those of manual design, while a manual design will take a designer a couple of days to generate.

SWARM: A Self-Organization Approach for Layout Automation in Analog IC Design

“…When applied to analog layout, suchlike approaches usually focus on one specific design step (particularly placement, as in [4] and [5], and routing, as in [6] and [7]) and its respective difficulties. Relatively few works, such as [8] and [9], deal with the challenge of handling these two heavily correlated tasks simultaneously.…”

“…While there are various different placement algorithms such as Min-Cut and Force-Directed Placement, the most widely used one is Simulated Annealing [3], for example utilized in [4], [9]- [11]. Evolutionary approaches such as genetic algorithms have as well been applied to analog placement [12], and furthermore, [13] also investigates the use of neural networks.…”

“…Amongst others, particular attention lies on abstract floorplan models such as TCG-S [4], sequence pairs [5], [9] and [10] and more enhanced representations [11]. Particular research effort is spent on the formal, explicit consideration of constraints.…”

A Novel Optimal 2-D Layout for Cache Memory at 45nm CMOS Technology

“…Device merging [1] is also known as geometry sharing techniques because group will share their geometries to reduce area and wire length. In this technique the group will International Journal of Advanced Science and Technology Vol.82 (2015) merge either horizontal or vertical and merge dynamically either merge all in one group or merge in 2 different group.…”

Heterogeneous B^∗-trees for analog placement with symmetry and regularity considerations

“…As pointed out in [12], the wire connections among analog modules usually cannot cross the active regions of devices, implying that those wires often run through the spacing between modules. As a result, regular structures can benefit the routability.…”