Practical aspects of reliability analysis for IC designs

Pompl, T.; Schlunder, C.; Hommel, M.; Nielen, Heiko; Schneider, Jens

doi:10.1145/1146909.1146962

Cited by 19 publications

(6 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…(1) provides a correction between the electric field during use conditions and accelerated stress tests. Geometries with different line spacings scale differently to use conditions, as noted in [13,14]. Eq.…”

Section: Tddb Modelsmentioning

confidence: 99%

Backend dielectric reliability simulator for microprocessor system

Chen

Ahmed

Kim

et al. 2012

Microelectronics Reliability

View full text Add to dashboard Cite

Section: Tddb Modelsmentioning

confidence: 99%

Backend dielectric reliability simulator for microprocessor system

Chen

Ahmed

Kim

et al. 2012

Microelectronics Reliability

View full text Add to dashboard Cite

“…Time dependent degradation describes the effect of circuit aging, which comes with various fault effects like electromigration (EM), stress migration (SM), time dependent dielectric breakdown (TDDB), or negative bias temperature instability (NBTI) [6][7][8]. The time dependence of these aging effects differs strongly.…”

Section: Introductionmentioning

confidence: 99%

Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair

Koal

Vierhaus

2011

14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems

View full text Add to dashboard Cite

Reliability and the mean lifetime are major aspects in today's semiconductor device manufacturing. The continuous downscaling of transistor sizes and power supplies are the root causes of higher vulnerabilities of integrated circuits against time zero process variation, time dependent degradation and random faults induced by environmental influences like particle strikes. Handling permanent faults becomes inevitably a suitable solution to guarantee high reliabilities as well as increased lifetimes. Builtin self-repair is a possible solution, which exchanges faulty units with spare parts at the costs of extra hardware. In this paper, we evaluate the influence of different replacement strategies and their resulting additional hardware structures on reliability and mean lifetime. This analytical process allows to find the optimal replacement strategy for a given system, without implementing and synthesizing each case.

show abstract

“…To determine the lifetime of a chip, a correction is also needed to account for the difference between the vulnerable area of the product and the test structure. However, there is no literature on the method to find the vulnerable area for a chip for backend dielectric breakdown, except for the statement that the vulnerable area is "the total length of such [minimum spaced] lines within a product" [1].…”

Section: Introductionmentioning

confidence: 99%

TDDB chip reliability in copper interconnects

Bashir

Kim

Lim

et al. 2010

2010 IEEE International Integrated Reliability Workshop Final Report

View full text Add to dashboard Cite

Backend time dependent dielectric breakdown (TDDB) degrades the reliability of circuits with copper interconnects. We use test data to develop a methodology to evaluate chip lifetimes, because of backend TDDB, from layout statistics. We identify features in a layout that are critical to backend reliability, present a model to incorporate those features in determining chip lifetimes, and study the effect of different layout optimizations on chip lifetime.

show abstract

Practical aspects of reliability analysis for IC designs

Cited by 19 publications

References 6 publications

Backend dielectric reliability simulator for microprocessor system

Backend dielectric reliability simulator for microprocessor system

Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair

TDDB chip reliability in copper interconnects

Contact Info

Product

Resources

About