Graphic means for fabricating active circuit elements have been examined in an exploratory program. Compatible and complementary semiconductor‐,dielectric‐, and metal‐inks have been developed and tested. Their use in various juxtaposed and overlayed configurations has produced operational insulated‐gate field‐effect transistors. The ultimate goal is to establish processes compatible with existing processes for silk‐screened resistors and capacitors and produce high‐volume, low‐cost active circuits. Four types of graphically produced transistors typically exhibit two characteristic modes of behavior; high transconductance
false(≤2000µnormalmhosfalse)
coupled with poor frequency response
false(<100 normalcpsfalse)
; and low transconductance
false(≤20µnormalmhosfalse)
coupled with better frequency response
false(>100 normalcpsfalse)
. These behaviors correlate with gate‐dielectric parameters. Various organic and inorganic gate‐dielectric materials have been tested; best results to date have been obtained with nitrocellulose, silicate cement, glyceryl monostearate, or barium titanate in association with
normalCdS:normalCdSe
. Sintering of the semiconductor layer and postprocessing of the inks after each printing deposition have been found necessary to enhance device performance. The times involved with these operations are comparable to conventional screened conductor, resistor and capacitor processing periods.