Part I: Mixed-Signal Performance of Various High-Voltage Drain-Extended MOS Devices

Abstract

Abstract-In this paper, the optimization issues of various drain-extended devices are discussed for input/output applications. The mixed-signal performance, impact of process variations, and gate oxide reliability of these devices are compared. Lightly doped drain MOS (LDDMOS) was found to have a moderate performance advantage as compared to shallow trench isolation (STI) and non-STI drain-extended MOS (DeMOS) devices. Non-STI DeMOS devices have improved circuit performance but suffer from the worst gate oxide reliability. Incorporating an STI region underneath the gate-drain overlap improves the gate oxide reliability, although it degrades the mixed-signal characteristics of the device. The single-halo nature of DeMOS devices has been shown to be effective in suppressing the short-channel effects.Index Terms-Drain-extended MOS (DeMOS), hot carrier, input/output, lightly doped drain MOS (LDDMOS), mixed signal, reduced surface field (RESURF), reliability.

A Solution Toward the OFF-State Degradation in Drain-Extended MOS Device

“…3, as the hole temperature (i.e., energy) is relaxed significantly. Recently, we have reported few other ways of reducing BTBT current [1], [2]. However, they lead to degraded R ON or require an extra masking step.…”

“…1). Although the STI-type DeMOS has shown excellent gate oxide reliability, it is known for its degraded mixed-signal performance [1], [2]. The non-STI device shows excellent mixed-signal performance but suffers from significant gate oxide reliability concerns in the OFF state [3].…”

Performance Optimization of LDMOS Transistor with Dual Gate Oxide for Mixed-Signal Applications

“…Recently, several groups have proposed a range of LDMOS structures to improve their device performance [5][6][7][8][9][10][11][12][13][14]. In advanced reduced surface field (RESURF) technologies and fieldplate gate structures, attention has been paid to the reduced device size and on-resistance (R ON ) while maintaining the breakdown voltage (BV) [5].…”

“…These techniques are effective only for the switching characteristics of power ICs. Alternatively, some LDMOS devices using gate and channel engineering have been reported [6][7][8][9][10][11][12]. These LDMOS devices are based on the splitgate field-effect transistor (SGFET) concept [13].…”

“…One of the imple-mentations of LDMOS devices through gate engineering showed improved device performance for mixed-signal applications [6][7][8][9]. Another LDMOS device with a lateral asymmetric channel (LAC) was also shown to improve the electrical characteristics [10][11][12]. Based on the SGFET concept, the channel inversion charge density can also be modulated by the gate oxide thickness.…”