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This paper discusses silicon complementary metal–oxide–semiconductor (CMOS) field-effect transistors with dual work function gates (DWFG) to improve transconductance (g m) and drain conductance (g ds) characteristics. For a n-channel metal–oxide–semiconductor field-effect transistor (MOSFET) device, the polycrystalline silicon (poly-Si) gate on the source and drain side are doped p+ and n+, respectively and vice versa for a p-channel MOSFET. The work function difference in a poly-Si gate affects channel potential distribution and increases the lateral electric field inside the channel. The increased electric field inside the channel improves carrier drift velocity. Experimental results from the fabricated DWFG devices show improved g m and g ds over conventional single work function gate devices.

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