Overview of oversampling clock and data recovery circuits

The SpaceFibre provides numerous advantages over the SpaceWire: QoS, FDIR, high transmission rate, galvanic isolation, lower cable mass. At moderate speeds, e.g. 10-200 Mbps, the SpaceFibre interface implementation can be significantly simplified with oversampling techniques, which does not require PLLs and analog CDR blocks. It makes possible fully digital implementation of the SpaceFibre interface in a simple ASIC or FPGA. This paper presents an oversampling technique based on digital signal processing. The technique allows to enhance transmission rate, operational distance, phase/amplitude distortion tolerance and higher noise immunity in compare with the traditional edge detection method.Index Terms -SpaceWire, SpaceFibre, oversampling, clock and data recovery.

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“…Robust digital oversampling methods suggest different techniques for transition filtering and bit interval boundaries calculation [6].…”

Section: Digital Oversampling Techniquementioning

confidence: 99%

Advanced oversampling techniques for the SpaceFibre

Goussev¹,

Skok²,

Maksimovskij³

et al. 2014

2014 International SpaceWire Conference (SpaceWire)

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“…Dedicated signal lines for clock and auxiliary signals must be avoided to minimize the number of required couplers. As a result, the clock signal must be recovered from the transmitted data signal [31]. Auxiliary signals are sent together with the main data in one serial data packet.…”

Section: A Communication Protocol Requirementsmentioning

confidence: 99%

Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Scharrer

Halton

Scanlan

et al. 2012

IEEE Trans. Circuits Syst. I

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Abstract-An efficient high-speed bi-directional data transmission scheme for isolated AC-DC and DC-DC switched mode power converters is presented. The bi-directional scheme supports fast, efficient and reliable transmission of digitally encoded data across the isolation barrier and enables primary side control, allowing effective start-up and a simple interface to system controllers. Another key feature is that the bi-directional communication is independent of coupler gain and degradation and only the minimum number of couplers is required. The digital interface can also be used to transmit auxiliary signals between both sides. For test purposes, the scheme has been implemented on FPGAs and verified using a custom-built SMPC board.

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“…18 The clock data recovery (CDR) is one of the most important blocks in the wireless communication systems. [19][20][21] Because the operating frequency difference of Tx and Rx is unavoidable, the clock information in the Rx side should be adaptively adjusted to recover the correct data symbols by a CDR. Even without the frequency mismatch, the phase of Tx and Rx clocks may be out of sync.…”

Section: Introductionmentioning

confidence: 99%

Short-distance visible light communication with simple clock data recovery for audio applications

Song

Nam

2015

Jnl Soc Info Display

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As light emitting diodes (LEDs) of fast response time are wide-spreading in a variety of applications such as displays, lighting, traffic signals, and automobiles, many researches on transferring the data with the visible lights of LEDs have been conducted. This paper describes such a visible light communication system that supports the audio applications at the short distance up to 80 cm and the data bandwidth of 32 kHz. Especially, a simple clock data recovery (CDR) is used to achieve the optimum sampling and compensate for the frequency offset between transmitter and receiver. The proposed CDR obtains three samples per symbol and then adjusts the sampling point properly with the pattern of three samples over the frequency offset range of ±1.5% without changing the operating frequency of a receiver side. In the prototype system, a transmitter is composed of audio encoder, field programmable gate array, LED driver, and LEDs and a receiver consists of photodiode, comparator, field programmable gate array, and audio decoder. At the distance of 50 cm and the data rate of 32 kbps, the measured bit error rates are 0.101 and less than 10 À8 without and with CDR, respectively.Keywordsvisible light communication, clock data recovery, frequency offset, bit error rate.

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Overview of oversampling clock and data recovery circuits

Abstract: Phase-Locked Loop (PLL)

Cited by 15 publications

References 25 publications

Advanced oversampling techniques for the SpaceFibre

Advanced oversampling techniques for the SpaceFibre

Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Short-distance visible light communication with simple clock data recovery for audio applications

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