On the RESET-SET transition in Phase Change Memories

Abstract

We characterize SET operation in Phase Change Memories. A measurement procedure aiming to investigate resistance transition from amorphous to crystalline states is shown. Results give interesting insights on the crystallization process of GST material and a simple model is introduced. Crystallization process obeys to a constant energy law. Fast SET pulses require high power; slow SET pulses can be implemented in low power applications. Results may be used for an optimized design of memory cell operating conditions.

Simulation of non-volatile memory cell using chalcogenide glasses

“…A 2D model using a finite element method has been developed for the simulation of the thermal behaviour of the memory cell. Incubation time for the crystallization [29] is not considered in the model. The temporal evolution of temperature is obtained.…”

Comprehensive Phase-Change Memory Compact Model for Circuit Simulation

“…Crystallization time as a function of temperature. < ABC is the sum of < I* and < G* , so that the process is quick at high temperature and slow at low temperature the low current regime and the Rampdown SET is high current pulses with increasing fall times [30], [31].…”