Comprehensive Phase-Change Memory Compact Model for Circuit Simulation

Pigot, Corentin; Bocquet, Marc; Gilibert, Fabien; Reyboz, Marina; Cueto, O.; Marca, V. Della; Zuliani, P.; Portal, Jean‐Michel

doi:10.1109/ted.2018.2862155

Cited by 14 publications

(8 citation statements)

References 31 publications

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“…However, such mapping does not lead to a significant change in the ambient temperature. This is because of the the chalcogenide alloy (e.g., Ge 2 Sb 2 Te 5 [84]) used to build a PCM cell, which keeps the self-heating temperature of the cell concentrated at the interface between the heating element and the amorphous dome (see Figure 2), with only a negligible spatial heat flow to the surrounding [85].…”

Section: Average Temperaturementioning

confidence: 99%

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Titirsha¹,

Song²,

Das³

et al. 2021

Preprint

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Neuromorphic computing systems are embracing memristors to implement high density and low power synaptic storage as crossbar arrays in hardware. These systems are energy efficient in executing Spiking Neural Networks (SNNs). We observe that long bitlines and wordlines in a memristive crossbar are a major source of parasitic voltage drops, which create current asymmetry. Through circuit simulations, we show the significant endurance variation that results from this asymmetry. Therefore, if the critical memristors (ones with lower endurance) are overutilized, they may lead to a reduction of the crossbar's lifetime. We propose eSpine, a novel technique to improve lifetime by incorporating the endurance variation within each crossbar in mapping machine learning workloads, ensuring that synapses with higher activation are always implemented on memristors with higher endurance, and vice versa. eSpine works in two steps. First, it uses the Kernighan-Lin Graph Partitioning algorithm to partition a workload into clusters of neurons and synapses, where each cluster can fit in a crossbar. Second, it uses an instance of Particle Swarm Optimization (PSO) to map clusters to tiles, where the placement of synapses of a cluster to memristors of a crossbar is performed by analyzing their activation within the workload. We evaluate eSpine for a state-of-the-art neuromorphic hardware model with phase-change memory (PCM)-based memristors. Using 10 SNN workloads, we demonstrate a significant improvement in the effective lifetime.

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Section: Average Temperaturementioning

confidence: 99%

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Titirsha¹,

Song²,

Das³

et al. 2021

Preprint

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“…Our fully continuous compact model [2] is based on rate equations of phase fractions. The device resistance is computed using phase resistances in series weighted by their respective phase fraction [4], as in equation 1:…”

Section: Compact Model Equations and Parametersmentioning

confidence: 99%

“…The main requirements for a compact model is to be fast, robust and accurate, so that designers are able to simulate correctly memory arrays. In this aim, we have already proposed a compact model of PCM (to appear in [2]), which is fully continuous, based on comprehensive rate equations and validated versus experimental data.…”

Section: Introductionmentioning

confidence: 99%

PCM compact model: Optimized methodology for model card extraction

Pigot

Gilibert

Reyboz

et al. 2018

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

Self Cite

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To achieve high yield on product embedding PCM memory, it is mandatory to provide to designers accurately calibrated PCM compact model. To achieve this goal, it is mandatory to develop standardized model card extraction methodology. In this paper, we present a PCM model card extraction flow based on a minimal set of static and dynamic measurements. Based on this measurement, characteristics are first obtained and model card parameters extracted without any loop back, i.e. each parameter is extracted only once on a given characteristic. After this extraction procedure, model card values are validated through a comparison with an extra characteristics SET-Low characteristic not used for the extraction.

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“…In this case, the nonvolatile memories (NVMs) have attracted much interest in both academia and industry. To date, plenty of NVM technologies have been under intensive researches and developments, such as resistive random access memory (RRAM) [56], phase change memory (PCM) [49], spin-transfer-torque magnetic random access memory (STT-MRAM) [19], and ferroelectric random access memory (FeRAM) [48], etc. These NVMs share similar properties that ofer byte-addressability with persistence performance.…”

Section: Introductionmentioning

confidence: 99%

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

Wang

Zhou

et al. 2023

ACM Trans. Embed. Comput. Syst.

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Energy consumption has been a big challenge for electronic devices, particularly, for the battery-powered Internet of Things (IoT) equipment. To address such a challenge, on one hand, low-power electronic design methodologies and novel power management techniques have been proposed, such as nonvolatile memories and instantly on/off systems; on the other hand, the energy harvesting technology by collecting signals from human activity or the environment has attracted widespread attention in the IoT area. However, the system with self-powered energy harvesting may suffer frequent energy failures or fluctuating energy conditions, which degrade system reliability and user experience. Therefore, how to make the system under unreliable power inputs operate correctly and efficiently is one of the most critical issues for the energy harvesting technology. In this paper, we built an instantly on/off system based on nonvolatile STT-MRAM for IoT applications, which can instantly power on/off under different conditions of the harvested energy. The system powers on and operates normally when the harvested energy is enough (over the preset threshold); otherwise, the system powers off and stores the operational data back to the nonvolatile STT-MRAM. We described implementations of the hardware/software co-designed architecture (with image acquisition as an example) based on the commercialized 32MB STT-MRAM, and experimentally demonstrated the system functionality and efficiency under five typical energy harvesting scenarios, including radio-frequency (RF), thermal, solar, piezoelectric and WIFI. Our experimental results show that the power consumption and data restore time were reduced by 15.1 \(\% \) and 714 times respectively in comparison with the DRAM-based counterpart.

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Comprehensive Phase-Change Memory Compact Model for Circuit Simulation

Cited by 14 publications

References 31 publications

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

PCM compact model: Optimized methodology for model card extraction

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

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