On-Line DA-LUT Architecture for High-Speed High-Order Digital FIR Filters

Eshtawie, Mohamed Al Mahdi; Othman, Masuri

doi:10.1109/iccs.2006.301454

Cited by 9 publications

(6 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The online DA LUT architecture [6] Serial distributed arithmetic (SDA) is a high speed multiplication technique based on serial processing at bit level [7] . The SDA can also be referred to as bit serial word parallel (BSWP) method since the output sample is available after its pipelined bits are processed.…”

Section: Figmentioning

confidence: 99%

“…Proposed Architecture: The architecture proposed in this paper applies the same concept of the online architecture presented in [6] . However, in this work the if-then adder is used instead of the carry lookahead adder.…”

Section: Figmentioning

confidence: 99%

“…Basically, DA is an algorithm that performs multiplication with a look-up table based scheme. Hence it is computational operation that forms an inner (dot) product of a pair of vectors in a single direct step [6] . For 4-tap FIR filter implemented with distributed arithmetic technique, the lookup table description is given in Fig.…”

Section: Introductionmentioning

confidence: 99%

“…Fig. 1: Original Distributed Arithmetic Architecture [3] Therefore, in [6] we proposed a new architecture that we called online DALUT. By online architecture we mean that the needed LUT's locations contents are calculated while processing the input data.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

IFâ€“THEN Adder Application in Online DALUT Implementation

Eshtawie¹,

Othman²

2007

American J. of Applied Sciences

Self Cite

View full text Add to dashboard Cite

This paper presents the application of a proposed if-then rule based adder in implementing distributed arithmetic online lookup table (DALUT). The online DALUT development and implementation is a continuation of our previous work where we proposed this idea and use it in designing finite impulse (FIR) filter. In our LUT architecture we have been able to overcome the major disadvantage of the basic DA architecture reported as the exponential growth of the LUT size with the number of input variables. The if-then adder was proposed in another work where it shows an efficient performance when compared with the well known ripple carry adder (RCA) and the carry lookahead adder (CLA). The online DALUT with the if-then adder was applied in designing 70-tap finite impulse response pulse shaping filter and some other different order FIR filters. The design was coded with Verilog hardware description language (verilog HDL) and synthesized using the Xilinx technology after being simulated with ModelSim 7.5g. The synthesis report shows that the design preference when using the if-then adder more efficient than in the case of the RCA and CLA adder. The maximum frequency reached with the design using the if-then adder was 85.095MHz, whereas, when using CLA and RCA adders it 77.936MHz and 77.042MHz respectively. Finally the design has been successfully downloaded to Virtex-II FPGA fg456 and tested with the TLA5201 logic analyzer.

show abstract

Section: Figmentioning

confidence: 99%

Section: Figmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

IFâ€“THEN Adder Application in Online DALUT Implementation

Eshtawie¹,

Othman²

2007

American J. of Applied Sciences

Self Cite

View full text Add to dashboard Cite

show abstract

“…All input variables are sequenced simultaneously, bit serial first to address the LUT; its outcome is added to the accumulated partial products [8].…”

Section: Fir Realization Using Damentioning

confidence: 99%