Microelectronics Reliability

2008

DOI: 10.1016/j.microrel.2008.06.039

|View full text |Cite

|

Sign up to set email alerts

|

On chip–package stress interaction

¹

,

²

,

G. Q. (Kouchi) Zhang

³

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction1

Citation Types

Supporting

0

Mentioning

1

Contrasting

0

Year Published

2009

2009

2018

2018

Publication Types

Select...

Other4

Article1

Relationship

Self Cite0

Independent5

Authors

Journals

Cited by 5 publications

(1 citation statement)

References 4 publications

Supporting

0

Mentioning

1

Contrasting

0

Order By: Relevance

“…Mechanical impacts, deformation of the PCB (printed circuit board), high pressure, etc. can also create stress in the SiC/Si heterojunction [11].…”

Section: Introductionmentioning

confidence: 99%

Electrical Properties of p-type 3C-SiC/Si Heterojunction Diode Under Mechanical Stress

¹

,

²

,

³

et al. 2014

IEEE Electron Device Lett.

View full text Add to dashboard Cite

The current mechanism and effects of external transverse stress in the [110] orientation on the electrical properties of a single crystal (100) p-3C-SiC/p-Si heterojunction diode are reported for the first time. It has been observed that the current flow in the heterojunction is due to tunneling through the triangular potential barrier formed due to valence band offset between Si and SiC. The applied stress produces small changes in tunneling current when stress is increased from 0 to 308 MPa. The observed increase in current at 0.24 V is 10% at maximum stress of 308 MPa. The increase of tunneling current when applying stress is explained in terms of stress, which alters the out-of-plane effective mass, and the effective tunneling barrier height of holes in top subbands of p-type Si.Index Terms-p-type 3C-SiC/Si heterojunction, tunneling current, strain induced effects.

“…Mechanical impacts, deformation of the PCB (printed circuit board), high pressure, etc. can also create stress in the SiC/Si heterojunction [11].…”

Section: Introductionmentioning

confidence: 99%

Electrical Properties of p-type 3C-SiC/Si Heterojunction Diode Under Mechanical Stress

¹

,

²

,

³

et al. 2014

IEEE Electron Device Lett.

View full text Add to dashboard Cite

The current mechanism and effects of external transverse stress in the [110] orientation on the electrical properties of a single crystal (100) p-3C-SiC/p-Si heterojunction diode are reported for the first time. It has been observed that the current flow in the heterojunction is due to tunneling through the triangular potential barrier formed due to valence band offset between Si and SiC. The applied stress produces small changes in tunneling current when stress is increased from 0 to 308 MPa. The observed increase in current at 0.24 V is 10% at maximum stress of 308 MPa. The increase of tunneling current when applying stress is explained in terms of stress, which alters the out-of-plane effective mass, and the effective tunneling barrier height of holes in top subbands of p-type Si.Index Terms-p-type 3C-SiC/Si heterojunction, tunneling current, strain induced effects.

Effective Stress Relief Without Jeopardizing Reliability in Overmolded Packages with Stress Buffers

¹

,

Zaal²,

et al. 2018

2018 IEEE 68th Electronic Components and Technology Conference (ECTC)

View full text Add to dashboard Cite

No abstract

Reliability consequences of the chip-package interactions

¹

2009

2009 11th Electronics Packaging Technology Conference

View full text Add to dashboard Cite

No abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

hi@scite.ai

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

Product

Browser Extension Assistant by scite Citation Statement Search Reference Check Visualizations Dashboards Explore Journals Explore Organizations Explore Funders Embedding Badge Embedding Citation Search Pricing

Resources

Blog Help & FAQ Accessibility Statement API Terms For Universities & Governments For Researchers For Publishers For Corporate, Pharma & Enterprise Author Marketing Become an Affiliate Get an organization trial or quote scite Data & Services

About

News & Press Careers Read our Paper Coverage

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Copyright © 2024 scite LLC. All rights reserved.

Made with 💙 for researchers

Part of the Research Solutions Family.