Nitric acid method for fabrication of gate oxides in TFT

Mizushima, Shigeaki; Imai, Shigeki; Asuha,; Tanaka, Masato; Kobayashi, Hikaru

doi:10.1016/j.apsusc.2007.10.103

Cited by 21 publications

(8 citation statements)

References 18 publications

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“…[15][16][17][18] Using the two-step NAOS method ͑i.e., immersion in ϳ40 wt % HNO 3 followed by that in 68 wt% HNO 3 ͒, on the other hand, a relatively thick ͑10-30 nm͒ SiO 2 layer can be formed at 120°C. [19][20][21] In the present study, the dependence of the characteristics of the ϳ10 nm NAOS SiO 2 layer on the HNO 3 concentrations has been investigated.…”

Section: Introductionmentioning

confidence: 99%

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Imamura

Takahashi

Asuha

et al. 2010

Journal of Applied Physics

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Electrical characteristics and physical properties of 8–10 nm silicon dioxide (SiO2) films formed on Si (100) substrates by use of the nitric acid oxidation of Si method at ∼120 °C have been investigated. The atomic density of the SiO2 layer increases with the HNO3 concentration. Fourier transformed infrared absorption measurements show that the higher the HNO3 concentration, the higher the atomic density of the SiO2 layer. From the Fowler–Nordheim plots, the barrier height at the SiO2/Si interface is found to increase with the HNO3 concentration. The leakage current density flowing through the SiO2 layer decreases with the HNO3 concentration employed for the SiO2 formation. It is concluded that the higher atomic density leads to SiO2 band-gap widening and thus to the higher band discontinuity energy at the SiO2/Si interface, which in turn results in a decrease in the tunneling probability of charge carries through SiO2. The density of oxide fixed charges decreases with an increase in the HNO3 concentration. When postmetallization annealing is performed at 250 °C in hydrogen atmosphere on the SiO2 layer formed with 68 wt % HNO3, electrical characteristics become as good as those of a thermally grown SiO2 layer formed at 900 °C.

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Section: Introductionmentioning

confidence: 99%

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Imamura

Takahashi

Asuha

et al. 2010

Journal of Applied Physics

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“…In order to satisfy these contradictive requirements, the nitric acid oxidation of Si (NAOS ® ) method [2,3,4], i.e., direct oxidation of a poly-Si thin film on a glass substrate in a 68wt% HNO 3 solution below 120˚C, has been used to form an ultrathin high quality oxide (SiO 2 ) layer before depositing a (chemical vapor deposition) CVD layer to improve Si/SiO 2 interfacial characteristics. Using this NAOS method, we have succeeded in decreases of the gate insulator thickness from 80 nm to 40 nm [5] and 20 nm [6].…”

Section: Introductionmentioning

confidence: 99%

Ultra-low power TFTs with 10 nm stacked gate insulator fabricated by nitric acid oxidation of Si (NAOS) method

Matsumoto

Yamada

Tsuji

et al. 2010

2010 International Electron Devices Meeting

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“…Such SiO 2 insulating layers are usually produced by deposition methods such as CVD and PECVD . However, high density SiO 2 layers cannot be fully fabricated using these deposition methods because incomplete suboxides are formed during the process . In contrast, direct oxidation methods can allow the formation of a high density SiO 2 layer .…”

Section: Introductionmentioning

confidence: 99%

Improved Interface and Electrical Properties by Inserting an Ultrathin SiO₂ Buffer Layer in the Al₂O₃/Si Heterojunction

Kim

Choi

Ryu

et al. 2019

Adv Funct Materials

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An ultrathin SiO 2 interfacial buffer layer is formed using the nitric acid oxidation of Si (NAOS) method to improve the interface and electrical properties of Al 2 O 3 /Si, and its effect on the leakage current and interfacial states is analyzed. The leakage current density of the Al 2 O 3 /Si sample (8.1 × 10 −9 A cm −2 ) due to the formation of low-density SiO x layer during the atomic layer deposition (ALD) process, decreases by approximately two orders of magnitude when SiO 2 buffer layer is inserted using the NAOS method (1.1 × 10 −11 A cm −2 ), and further decreases after post-metallization annealing (PMA) (1.4 × 10 −12 A cm −2 ). Based on these results, the influence of interfacial defect states is analyzed. The equilibrium density of defect sites (N d ) and fixed charge density (N f ) are both reduced after NAOS and then further decreased by PMA treatment. The interface state density (D it ) at 0.11 eV decreases about one order of magnitude from 2.5 × 10 12 to 7.3 × 10 11 atoms eV −1 cm −2 after NAOS, and to 3.0 × 10 10 atoms eV −1 cm −2 after PMA. Consequently, it is demonstrated that the high defect density of the Al 2 O 3 /Si interface is drastically reduced by fabricating ultrathin high density SiO 2 buffer layer, and the insulating properties are improved.The ORCID identification number(s) for the author(s) of this article can be found under https://doi.

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Nitric acid method for fabrication of gate oxides in TFT

Cited by 21 publications

References 18 publications

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Ultra-low power TFTs with 10 nm stacked gate insulator fabricated by nitric acid oxidation of Si (NAOS) method

Improved Interface and Electrical Properties by Inserting an Ultrathin SiO₂ Buffer Layer in the Al₂O₃/Si Heterojunction

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Nitric acid method for fabrication of gate oxides in TFT

Cited by 21 publications

References 18 publications

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Nitric acid oxidation of Si method at 120 °C: HNO3 concentration dependence

Ultra-low power TFTs with 10 nm stacked gate insulator fabricated by nitric acid oxidation of Si (NAOS) method

Improved Interface and Electrical Properties by Inserting an Ultrathin SiO2 Buffer Layer in the Al2O3/Si Heterojunction

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Improved Interface and Electrical Properties by Inserting an Ultrathin SiO₂ Buffer Layer in the Al₂O₃/Si Heterojunction