2019
DOI: 10.1049/iet-pel.2019.0094
|View full text |Cite
|
Sign up to set email alerts
|

Nine‐level voltage‐doubler bi‐polar module for multilevel DC to AC power conversion

Abstract: A major disadvantage of two-stage topologies of switched capacitors based multilevel inverters is the use of H-bridge switches which endure high peak-inverse-voltage (PIV). In such topologies, the H-bridge stage is preceded by a levelgeneration stage which synthesises unipolar voltage levels. In this work, a bi-polar module is proposed which can synthesise nine levels at the AC terminals with a single DC input. The proposed module uses power switches with PIV equal to that of the input DC source. Use of switch… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
20
0

Year Published

2021
2021
2023
2023

Publication Types

Select...
6

Relationship

0
6

Authors

Journals

citations
Cited by 9 publications
(20 citation statements)
references
References 23 publications
0
20
0
Order By: Relevance
“…According to Table 3, the efficiency of the proposed basic topology in its operating output power range varies from 91% to 95.6%. Based on reported efficiencies, the topologies presented in [12, 15, 17] have higher efficiency, where the reported efficiency of [16, 18, 19] is less than that of the proposed basic topology. The reported efficiencies for [10, 14] are almost the same range of proposed basic topology.…”
Section: Comparisonsmentioning
confidence: 99%
See 1 more Smart Citation
“…According to Table 3, the efficiency of the proposed basic topology in its operating output power range varies from 91% to 95.6%. Based on reported efficiencies, the topologies presented in [12, 15, 17] have higher efficiency, where the reported efficiency of [16, 18, 19] is less than that of the proposed basic topology. The reported efficiencies for [10, 14] are almost the same range of proposed basic topology.…”
Section: Comparisonsmentioning
confidence: 99%
“…In [16], a 7-level triple-gain inverter has been presented that uses a single DC source, 2 flying capacitors, 11 switches (12 MOSFETs), and a bidirectional one. Another single-source 9-level inverter has been introduced in [17] that produced a double boosting factor by 2 floating capacitors and 10 switches (11 MOSFETs). One switch is bidirectional.…”
Section: Introductionmentioning
confidence: 99%
“…Peak inverse voltage (PIV) of these topologies is equal to Vdc. However, the boosting factor of 20,21 is unity per capacitor and 22,23 is 0.5 per capacitor. Furthermore, these require more capacitors and semiconductors to extend the inverter circuit for other levels.…”
Section: Introductionmentioning
confidence: 99%
“…To address issue of double staged boost MLIs, authors in Reference 20‐23 have developed single stage inverters. These topologies do not require H‐bride to produce zero/negative levels.…”
Section: Introductionmentioning
confidence: 99%
“…25: Single-stage switched-capacitor unit (S 3 CM) topology.Motivated by the objective of S 3 CM, reduce device count and increase number of levels, various compact single-stage configurations are reported[156][157][158][159]. In[156,157], a nine-level boost topology with voltage gain two is reported. This configuration is similar to Fig.25, but the device count reduced by one, which leads to reduction in TSV to 10E.…”
mentioning
confidence: 99%