New universal element with integrated PUF and TRNG capability

Varchola, Michal; Drutarovský, Miloš; Fischer, Viktor

doi:10.1109/reconfig.2013.6732311

Cited by 12 publications

(4 citation statements)

References 14 publications

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“…For this reason, in opposite to other solutions like in Varchola et al [13], [14], the Z variance in the TDL results from the preceding r-osc mode, in which the random phases…”

Section: B Initial Condition Distribution and Resolve Time Of Tdl Incontrasting

confidence: 89%

“…8(c), that t rosc corresponding to a few initial periods, i.e., t rosc < 30 ns, causes a significant decrease in min t rosc σ T r . In such a case, the metastable mode is primarily responsible for the T r variability, and therefore the TDL becomes similar to the solution presented in Varchola et al [13].…”

Section: Figs 8(b) and (C)supporting

confidence: 77%

“…In their approach named TERO (transition effect ring oscillator) the oscillatory metastability is used as a randomness source. The TERO's topology is similar to an RS flip-flop consisting of NAND gates, in which both the reset and set inputs are connected together [13]. In theory, the positive edge on the common node of R and S (called the "control" line in Varchola et al [14]) causes the metastable behavior, because the lead-in interval (δ) of R and S signal edges is equal to zero [15].…”

Section: Introductionmentioning

confidence: 99%

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Lightweight TRNG Based on Multiphase Timing of Bistables

Wieczorek

2016

IEEE Trans. Circuits Syst. I

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The paper presents a concept of a True Random Number Generator (TRNG) that utilizes phase noise of a pair of ring oscillators (ROs) to increase the variance of the initial condition of a bistable. For this purpose a special TRNG D-latch architecture (TDL) has been proposed, which can either operate in the oscillatory ring-oscillator mode or the nearly-metastable mode. The RO mode increases the probability of the nearly metastable operation of the TDL, which in turn increases the mean value and variance of the resolve time. Moreover, due to the oscillatory nature of the TDL metastability, the resolve time can be easily measured and used for further randomness harvesting in the TRNG. The proposed TRNG uses a pair of TDLs to reduce sensitivity to process or temperature variation, whereas TDLs' individual resolve time, their resolve time difference and logical state contribute to randomness. In the article, the impact of the devices' imbalance (tolerance) resulting from process variation on the resultant entropy is also explored. The proposed TRNG based on TDLs is scalable and has been implemented in modern CPLD and FPGA devices whereas the bit rate reached up to 1 Mbit. The article also discusses theoretical issues related to a transformation of phase and resolve time probability density functions and their influence on TRNG parameters.

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“…For this reason, in opposite to other solutions like in Varchola et al [13], [14], the Z variance in the TDL results from the preceding r-osc mode, in which the random phases…”

Section: B Initial Condition Distribution and Resolve Time Of Tdl Incontrasting

confidence: 89%

Section: Figs 8(b) and (C)supporting

confidence: 77%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Lightweight TRNG Based on Multiphase Timing of Bistables

Wieczorek

2016

IEEE Trans. Circuits Syst. I

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“…The TERO cell is a metastable structure that was first presented in [25]. The structure was originally used as a true random number generator but has the right characteristics to be used as a PUF [26], [24]. Figure 1 presents the generic structure of the TERO cell.…”

Section: A the Tero Cellmentioning

confidence: 99%

Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF

Marchand

Bossuet

Mureddu

et al. 2018

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Today, life is becoming increasingly connected. From TVs to smartphones, including vehicles, buildings, and household appliances, everything is interconnected in what we call the "Internet of Things" (IoT). IoT is now part of our life and we have to deal with it. More than 10 billion devices are already connected and five times more are expected to be deployed in the next five years. While deployment and integration of IoT is expanding, one of the main challenge is to provide practical solutions to security, privacy and trust issues in IoT. Protection and security mechanisms need to include features such as interoperability and scalability but also traceability, authentication and access control while remaining lightweight. Among the most promising approaches to such security mechanisms, physical unclonable functions (PUF) provide a unique identifier for similar but different integrated circuits using some of their physical characteristics. These types of functions can thus be used to authenticate integrated circuits, provide traceability and access control. This paper presents a comprehensive case study of the transient effect ring oscillator (TERO) PUF from its implementation on FPGAs to its complete characterization. The implementation of the PUF is detailed for two different families of FPGAs: Xilinx Spartan 6 and Altera Cyclone V. All the metrics used for the characterization are explained in detail and the results of the characterization include robustness to environmental parameters including variations in temperature and voltage. Finally, we compare our results with those obtained for another PUF: the ring oscillator (RO) PUF. All the design files are available online to ensure repeatability and enable comparison of our contribution with other studies.

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