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All the preamplifiers dedicated for Quartz Enhanced PhotoAcoustic Spectroscopy (QEPAS) applications that have so far been reported in the literature have been based on operational amplifiers working in transimpedance configurations. Taking into consideration that QEPAS sensors are based on quartz tuning forks, and that quartz has a relatively high voltage constant and relatively low charge constant, it seems that a transimpedance amplifier is not an optimal solution. This paper describes the design of a quartz QEPAS sensor preamplifier, implemented with voltage amplifier configuration. Discussion of an electrical model of the circuit and preliminary measurements are presented. Both theoretical analysis and experiments show that use of the voltage configuration allows for a substantial increase of the output signal in comparison to the transimpedance circuit with the same tuning fork working in identical conditions. Assuming that the sensitivity of the QEPAS technique depends directly on the properties of the preamplifier, use of the voltage amplifier configuration should result in an increase of QEPAS sensitivity by one to two orders of magnitude.

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The paper presents a concept of a True Random Number Generator (TRNG) that utilizes phase noise of a pair of ring oscillators (ROs) to increase the variance of the initial condition of a bistable. For this purpose a special TRNG D-latch architecture (TDL) has been proposed, which can either operate in the oscillatory ring-oscillator mode or the nearly-metastable mode. The RO mode increases the probability of the nearly metastable operation of the TDL, which in turn increases the mean value and variance of the resolve time. Moreover, due to the oscillatory nature of the TDL metastability, the resolve time can be easily measured and used for further randomness harvesting in the TRNG. The proposed TRNG uses a pair of TDLs to reduce sensitivity to process or temperature variation, whereas TDLs' individual resolve time, their resolve time difference and logical state contribute to randomness. In the article, the impact of the devices' imbalance (tolerance) resulting from process variation on the resultant entropy is also explored. The proposed TRNG based on TDLs is scalable and has been implemented in modern CPLD and FPGA devices whereas the bit rate reached up to 1 Mbit. The article also discusses theoretical issues related to a transformation of phase and resolve time probability density functions and their influence on TRNG parameters.

A study of the front-end electronics for quartz tuning forks (QTFs) employed as optoacoustic transducers in quartz-enhanced photoacoustic spectroscopy (QEPAS) sensing is reported. Voltage amplifier-based electronics is proposed as an alternative to the transimpedance amplifier commonly employed in QEPAS experiments. The possibility to use differential input/output configurations with respect to a single-ended configuration has also been investigated. Four different architectures have been realized and tested: a single-ended transimpedance amplifier, a differential output transimpedance amplifier, a differential input voltage amplifier and a fully differential voltage amplifier. All of these amplifiers were implemented in a QEPAS sensor operating in the mid-IR spectral range. Water vapor in ambient air has been selected as the target gas species for the amplifiers testing and validation. The signal-to-noise ratio (SNR) measured for the different configurations has been used to compare the performances of the proposed architectures. We demonstrated that the fully differential voltage amplifier allows for a nearly doubled SNR with respect to the typically used single-ended transimpedance amplifier.

A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D-latch (flip-flop) state's uncertainty which is the source of randomness. In the proposed approach direct proximity of the metastable point is not necessary. Difference of the time of response of a pair of nearly metastable flip-flops lies upon the proposed circuit's principle of operation. It can be implemented in common programmable FPGA or CPLD circuits ensuring randomness quality-passing NIST, Diehard and Matlab tests.