New EPROM Data-Loss Mechanisms

Mielke, N.

doi:10.1109/irps.1983.361969

Cited by 31 publications

(24 citation statements)

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“…Furthermore, we have confirmed this assumption experimentally. The test sequence to evaluate the contamination was published by Mielke in 1983 at IRPS [2]. The tests are performed on wafers processed with a passivation layer UV transparent to allow a UV erasing.…”

Section: Memory Array Characterizationmentioning

confidence: 99%

“…To explain the initial shift, upper capacitance is added to the classical capacitive model (see figure 11). The classical equation (2) leads to a linear relation between the initial shift and the Vth before bake (equation (3)). …”

Section: Physical Modelingmentioning

confidence: 99%

“…A NVM cell must be able to retain its charge during at least 10 years without any applied voltage [1]. Therefore, accelerated tests at high temperatures are used to monitor the retention performances of the memory cells [2]. This reliability aspect becomes more critical for embedded NVMs, due to their integration in CMOS or BiCMOS technologies without any specific process step.…”

Section: Introductionmentioning

confidence: 99%

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Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories

Mora

Renard

Bossu

et al. 2006

2006 IEEE International Integrated Reliability Workshop Final Report

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In this work, we report on a thorough study of charge loss in embedded Non Volatile Memories. We focused on the fast initial threshold voltage (Vth) shift, which occurs during the first minutes of data retention bake. Experiments were performed to have a better understanding of this phenomenon. As a result, we can predict the Vth shift of a cell baked at 250°C and evaluate its impact on product reliability. This is the first time that this reliability aspect is characterized with such a level of accuracy. Based on these observations, a physical model is proposed to describe the fast initial threshold voltage shift.

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Section: Memory Array Characterizationmentioning

confidence: 99%

Section: Physical Modelingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories

Mora

Renard

Bossu

et al. 2006

2006 IEEE International Integrated Reliability Workshop Final Report

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show abstract

“…Oxide defects can cause charge loss or gain [56], [57]. In fact, if the cell is programmed, its FG has a negative potential due to the stored charge.…”

Section: ) Programming Disturbsmentioning

confidence: 99%

Flash memory cells-an overview

et al. 1997

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“…Several studies [1,2,3] on double poly cells reported ion contamination as a charge loss mechanism resulting in bit failure.…”

Section: Introductionmentioning

confidence: 99%

Water-Assisted Positive Ion Contamination Resulting in Charge Loss in Nonvolatile Memories

Gassot

Iline²,

Backer³

et al. 2000

30th European Solid-State Device Research Conference

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In this paper, the influence of back-end processing on the charge retention of floating gate nonvolatile memories is extensively studied. By implementing a wide variety of options for the back-end architecture, a consistent picture of the charge loss mechanisms is obtained, proving the dominant role of water assisted positive ion contamination and the blocking capability of the SiN passivation layer.

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New EPROM Data-Loss Mechanisms

Cited by 31 publications

References 0 publications

Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories

Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories

Flash memory cells-an overview

Water-Assisted Positive Ion Contamination Resulting in Charge Loss in Nonvolatile Memories

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