New EEPROM concept for single bit operation

Raguet, J.R.; Laffont, R.; Bouchakour, R.; Bidal, V.; Régnier, A.; Mirabel, J.M.

doi:10.1016/j.sse.2008.06.027

Cited by 5 publications

(3 citation statements)

References 10 publications

(9 reference statements)

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“…The cell model is derived from a previous work. 3) In this approach, the surface potential is determined with the charge neutrality, including the charge stored on the floating gate.…”

Section: Programming Operationsmentioning

confidence: 99%

“…This new structure derives from a previous work. 3) In this previous work a dual-gate structure was used to perform the memory operations without select transistor and so allowing a high density memory. But as for a standard EEPROM, high drain potential during writing operation is applied and so produces leakage current due to band to band tunneling (BTBT).…”

Section: Introductionmentioning

confidence: 99%

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A Dual-Gate Memory Cell with Two Inter-Poly Oxides

Raguet¹,

Calenzo²,

Laffont³

et al. 2009

jjap

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A new dual-gate memory cell with two different inter-poly oxides is presented in this paper. This cell allows high density memory application and a cell programming only with the dual-gate without high bias on drain or source compared to standard electrical erasable and programmable read-only memory (EEPROM). Concept has been validated in an EEPROM standard technology from STMicroelectronics and allows a cell area reduction of above 48%. The specificity is to use a dual-gate to program the cell with two different ways of charge injection and perform the memory operations without high bias on drain and also without select transistor. Thus this cell can be shrunk more easily and its lifetime can be improved because the band to band tunneling stress due to high drain potential is eliminated. Moreover, this dual-gate cell can become an adjustable threshold voltage transistor.

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“…The cell model is derived from a previous work. 3) In this approach, the surface potential is determined with the charge neutrality, including the charge stored on the floating gate.…”

Section: Programming Operationsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Dual-Gate Memory Cell with Two Inter-Poly Oxides

Raguet¹,

Calenzo²,

Laffont³

et al. 2009

jjap

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“…The controllability of the floating gate (FG) transistor threshold voltage shift could provide solutions to overcome some of these challenges and can be further explored in tuning circuits, switching circuits and also in millimetre-wave application, among other applications (Mabuza et al, 2009). Different FG structures have been proposed in literature (Raguet et al, 2008;Di Bartolomeo et al, 2009;Lin and Sun, 2007;Bouchakour et al, 2001).…”

Section: Introductionmentioning

confidence: 99%

The tunnelling and electron injection reliabilities for FG transistors

Mabuza

Sinha

2014

Microelectronics International

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Purpose -The purpose of this paper was to present the results of the three types of FG transistors that were investigated.The reliability issues of oxide thickness due to programming, fabrication defects and process variation may cause leakage currents and thus charge retention failure in the floating gate (FG). Approach -The tunnelling and electron injection methods were applied to program FG devices of different length (180 and 350 nm) and coupling capacitor sizes. The drain current and threshold voltage changes were determined for both gate and drain voltage sweep. The devices were fabricated using IBM 130 nm process technology. Findings -Current leakages are increasing with device scaling and reduce the charge retention time. During programming, charge traps may occur in the oxide and prevent further programming. Thus, the dominant factors are the reliability of oxide thickness to avoid charge traps and prevent current/charge leakages in the FG devices. The capacitive coupling (between the tunnelling and electron injection capacitors) may contribute to other reliability issues if not properly considered. Originality/value -Although the results have raised further research questions, as revealed by certain reliability issues, the results have shown that the use of FGs with nanoscale technology is promising and may be suitable for memory and switching applications.

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