Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation

Abstract

SUMMARYWe describe the recent progress on a Nb nine-layer fabrication process for large-scale single flux quantum (SFQ) circuits. A device fabricated in this process is composed of an active layer including Josephson junctions (JJ) at the top, passive transmission line (PTL) layers in the middle, and a DC power layer at the bottom. We describe the process conditions and the fabrication equipment. We use both diagnostic chips and shift register (SR) chips to improve the fabrication process. The diagnostic chip was designed to evaluate the characteristics of basic elements such as junctions, contacts, resisters, and wiring, in addition to their defect evaluations. The SR chip was designed to evaluate defects depending on the size of the SFQ circuits. The results of a long-term evaluation of the diagnostic and SR chips showed that there was fairly good correlation between the defects of the diagnostic chips and yields of the SRs. We could obtain a yield of 100% for SRs including 70,000 JJs. These results show that considerable progress has been made in reducing the number of defects and improving reliability.

Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing

“…Also, by virtue of recent developments in fabrication technology with a multi-layered structure [13], [14] and some energy-efficient circuit technology [15]- [19], several research projects on SFQ microprocessors have been undertaken [20], [21], and an 8-bit microprocessor composed of more than 10,000 Josephson junctions successfully operates at 50 GHz [7]. In addition, inventions of several novel superconductor devices based on new physical phenomena have made the SFQ logic technology much more attractive, e.g., superconductor junctions with one or more ferromagnet layers show different electrical characteristics depending on the magnetic states, by which we can obtain high-density, low-power, cryogenic memory compatible with SFQ circuits [22], [23].…”

Vector sensor for scanning SQUID microscopy

“…Our DC SQUID sensor consists of two JJs, which were designed to have a junction area of each JJ of 2.2 m x 2.2 m and the critical current Ic of 12.5 A. It was reported that the typical variation in JJ critical currents is better than 2% [20]. In each single sensor, the pick-up coil is connected to a SQUID washer directly, which was covered fully by superconducting Nb film.…”

Inductance and Current Distribution Extraction in Nb Multilayer Circuits with Superconductive and Resistive Components

“…InductEx remains the only simulator other than Lmeter [5] that can handle full-gate superconductive circuit extractions. We discuss the background to 3D inductance extraction, and show how extraction models are constructed and used to find inductances, coupling and current distribution for circuit layouts in the AIST advanced process (ADP2) [13], [14] and standard process (STP2). We also discuss developments and refinements that were necessary to model ADP2 and STP2 layouts.…”