Multilevel design understanding

Ray, Sandip; Harris, Ian G.; Fey, Görschwin; Soeken, Mathias

doi:10.1145/2966986.2980093

Cited by 6 publications

(1 citation statement)

References 18 publications

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“…Design understanding and debugging is an active field of research. Several methods targeting specific problems and different abstraction levels have been proposed [13]. For example, this includes natural language techniques to derive assertions from specifications [14], feature localization in ESL models [15] or in RTL descriptions [16], assertion mining at RTL [17], identification of instruction pipelines using static analysis on the netlist [18], template-based understanding of circuit components [19], and reverse engineering at the gatelevel [20], [21].…”

Section: Related Workmentioning

confidence: 99%

WAVING Goodbye to Manual Waveform Analysis in HDL Design With WAL

Klemmer,

Große

2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Starting points for design understanding and debugging of a Hardware Description Language (HDL) design are generated waveforms. However, waveform viewing is still a highly manual and tedious process, and unfortunately, there has been no progress for automating the analysis of waveforms. Therefore, we introduce the Waveform Analysis Language (WAL) in this paper. WAL allows to create and execute analysis programs on waveforms. We have realized WAL as a Domain Specific Language (DSL). This design choice has many advantages ranging from a natural expressiveness of a waveform analysis problem to providing an Intermediate Representation (IR) well-suited as a compilation target from other languages.We demonstrate the capabilities of WAL in four case studies, covering the analysis of hardware performance of different RISC-V processors, combined hardware/software profiling, the usage of WAL to analyze bus transactions, and the implementation of a new embedded DSL using WALs macro system.

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