Monte Carlo simulation of electron transport properties in extremely thin SOI MOSFET's

Abstract

Abstract-Electron mobility in extremely thin-film siliconon-insulator (SOI) MOSFET's has been simulated. A quantum mechanical calculation is implemented to evaluate the spatial and energy distribution of the electrons. Once the electron distribution is known, the effect of a drift electric field parallel to the Si-SiO 2 interfaces is considered. The Boltzmann transport equation is solved by the Monte Carlo method. The contribution of phonon, surface-roughness at both interfaces, and Coulomb scattering has been considered. The mobility decrease that appears experimentally in devices with a silicon film thickness under 20 nm is satisfactorily explained by an increase in phonon scattering as a consequence of the greater confinement of the electrons in the silicon film.

Extraordinarily high drive currents in asymmetrical double-gate MOSFETs

“…The extraordinary I on in the asymmetrical DG MOSFET, which is comparable to that in the symmetrical counterpart having the same I off , is due to the extended charge coupling, or dynamic threshold voltage reflected by r , and less n(z)-based degradation of total gate capacitance, reflected by C Gf(asym) , as well as the lower effective mass resulting from the stronger confinement. (For quasi-ballistic transport, which would be the actual case for L met = 50 nm [1], the carrier confinement, defined by the thin Si film as well the transverse electric field, could mean higher scattering rates and somewhat lower mobility [11] in both devices, thereby undermining the mass effect. )…”

Shrinking limits of silicon MOSFETs: numerical study of 10 nm scale devices

“…However, it seems that the overall effect of reducing t below 2 nm would be deteriorating. First, in layers of such small thickness, the mobility of electrons is expected to decrease sharply with decreasing t [2,14,15]. In fact, recent simulations [15] predicted the electron mobility µ in SOI MOSFET's to be around 350 cm 2 /Vs at an effective electric field of 6 × 10 5 V/cm.…”

“…First, in layers of such small thickness, the mobility of electrons is expected to decrease sharply with decreasing t [2,14,15]. In fact, recent simulations [15] predicted the electron mobility µ in SOI MOSFET's to be around 350 cm 2 /Vs at an effective electric field of 6 × 10 5 V/cm. This electric field corresponds to a confinement potential with a first quantized level of width t ′ = 2 nm.…”

Semi-classical transport modelling of CMOS transistors with arbitrary crystal orientations and strain engineering

“…We here just mention that the Multi Subband Monte Carlo (MSMC) has been successfully used for both n-MOS [31][32][33][34][35][36] and p-MOS transistors [37,38], and it has been employed even for nanowire transistors [39]. Recently, remarkable progresses were made in the deterministic, as opposed to statistical, solution of the BTE for quasi-1D nanowire transistors [39], but also for nanoscale MOSFETs [40].…”