Monolithic optoelectronic circuit design and fabrication by epitaxial growth on commercial VLSI GaAs MESFET's

Abstract

Abshct-A technique for realizing large-scale monolithic OEIC's, which involves epitaxially growing GaAs-based heterostructures on fully metallized commercial VLSI GaAs MES-FET integrated circuits, has recently been reported. In the initial work the circuits and LED's occupied distinct halves of a chip, the dielectric growth window was wet-etched after circuit fabrication, and the LED's required both n and p ohmic contacts to be formed after epitaxial growth. In this letter we report the use of standard foundry process etches to open dielectric growth windows intermixed with circuitry and the growth of n-side-down LED's on a sourcddrain ion-implanted n+ region serving as the n ohmic contact. A winner-take-all neural circuit is demonstrated using these advances, which are important steps toward realizing higher levels of circuit integration.T HAS RECENTLY been reported that fully processed,

Semiconductor Optical Sensors

“…Using a commercial GaAs-based MESFET process, it has been shown that heterostructures may be grown on the fully processed integrated circuits [97]; LEDs and simple optical functionality have been demonstrated. Alternatively, III±V semiconductor-based components may be hybridly bonded to CMOS driver electronics [98].…”

Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status

“…The OPTO-CHIP project is summarized in Sec. 4. Basic device and circuit characteristics and a number of optoelectronic integrated circuit results are presented in Sec.…”

“…Work on EoE began [1][2][3][4][5][6][7][8][9][10][11][12][13][14] at the Massachusetts Institute of Technology ͑MIT͒ in 1990. Initial results included the fabrication of LED-based neural-network optoelectronic integrated circuits 4 ͑OEICs͒ as well as the integration of resonant tunneling diodes 7 ͑RTDs͒ and surface-normal multiple-quantum-well modulators 8 ͓also known as selfelectro-optic devices ͑SEEDs͔͒. The performance of this early work was limited by a number of process shortcomings that recent innovations have overcome.…”

Monolithic integration of SEEDs and VLSI GaAs circuits by epitaxy on electronics

“…SEED circuits were designed and fabricated as multiproject chips which include SEED receivers, transmitters, NOR gates, and other functional logic [9]. In addition, a 10 x 10 SEED optical "bump circuit" neuron array was designed [6].…”

“…The growth regions for modulators, called dielectric growth wells (DGW's), are allocated during design and opened during fabrication. Once the circuitry is fully fabricated by Vitesse through MOSIS [9], the MQW modulator structures are grown by molecular beam epitaxy (MBE) in the cleaned DGW's. Post-growth fabrication turns the heterostructures into SEED's and interconnects them with the electronics on the same chip to form the final monolithic OEIC.…”