Modelling and simulation of hot-carriers degradation of high voltage floating lateral NDMOS transistors

Vandenbossche, Eric; Keukeleire, C. De; Wolf, M.; Hove, Hugo Van; Witters, J.

doi:10.1016/s0026-2714(98)00115-2

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Modelling and simulation of hot-carriers degradation of high voltage floating lateral NDMOS transistors

Cited by 4 publications

References 1 publication

Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations

Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations

A dc model for partially depleted SOI laterally diffused MOSFETs utilizing the HiSIM-HV compact model

Time-Dependent Drain- and Source-Series Resistance of High-Voltage Lateral Diffused Metal–Oxide–Semiconductor Field-Effect Transistors during Hot-Carrier Stress

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