Modeling and Electromagnetic Analysis of Multilayer Through Silicon Via Interconnect for 3D Integration

Abstract

Convergence of multiple functions in a single device is the main thought behind the development of the current electronic trends. So, the requirement for higher integration in electronic devices has become more important in present days than in the past. Through silicon via (TSV) is the latest interconnect technology proposed mainly for higher integration and higher frequency. Therefore, cross talk will be an essential issue that needs to be taken into consideration. In this paper, we study the electrical property of a GSSG (S-Signal, G-Ground) TSV structure and propose the accurate lumped model which can be used to predict the TSV performance. Since more dies are used within one chip, the single layer TSV cannot satisfy the requirement. Hence, we propose the multilayer TSV structure and study how the bump radius, bump height, and underfill material affect the TSV transmission performance and coupling issue, so that we can conduct a good TSV design. Furthermore, three multilayer 4 × 4 TSV array models are proposed with different GS distribution to analyze the detailed coupling results.

Delay and Power Analysis of Three Coupled through Silicon Vias in 3D ICs

“…By using TSVs the length of the interconnection has been lowered, this lowering significantly enhances device performance by decreasing power consumption and delay. The electrical property of a GSSG structure is analysed and implemented an accurate lumped model for the performance prediction of a TSV and studied about the bump radius, height and underfill material role in TSV performance and coupling factor [2]. The scalable and analytic electrical model is implemented for a TSV and the signalling performance and electrical behaviour at high frequencies are analysed in both frequency and time domains [3].…”