Minimization of the Line Resistance Impact on Memdiode-Based Simulations of Multilayer Perceptron Arrays Applied to Pattern Recognition

Abstract

In this paper, we extend the application of the Quasi-Static Memdiode model to the realistic SPICE simulation of memristor-based single (SLPs) and multilayer perceptrons (MLPs) intended for large dataset pattern recognition. By considering ex-situ training and the classification of the hand-written characters of the MNIST database, we evaluate the degradation of the inference accuracy due to the interconnection resistances for MLPs involving up to three hidden neural layers. Two approaches to reduce the impact of the line resistance are considered and implemented in our simulations, they are the inclusion of an iterative calibration algorithm and the partitioning of the synaptic layers into smaller blocks. The obtained results indicate that MLPs are more sensitive to the line resistance effect than SLPs and that partitioning is the most effective way to minimize the impact of high line resistance values.

SPICE Simulation of RRAM-Based Cross-Point Arrays Using the Dynamic Memdiode Model

“…To account for both the inference and write phases, the present implementation follows a reconfigurable approach, in which the partitioned CPA-based SLP is alternatively connected to the input/output signals (inference phase, Figure 5C) or to the writing stimuli (write phase, Figure 5D). The analogue electronics required for the inference phase has been described elsewhere in the literature [14,15]. However, the circuitry needed for the write phase requires a more complex circuital implementation, as the input stimuli are not passed simultaneously to all the CPA inputs, but sequentially.…”

“…Moreover, CPAs can be scaled down to 4F 2 , F being the feature size of the technology node [8], and placed at the Back-End of Line (BEOL), then exploiting the concept of 3D stacking. Memristor-based CPAs for pattern classification have been the focus of previous works [5,[9][10][11][12][13][14][15] considering not only different architectures but also a variety of device models. Hu et al [5] reported a simulation-based case study of character recognition using two CPAs with 256 × 26 synapsis (i.e., 256 rows by 26 columns, totaling ∼13 k devices) to represent both the positive and negative weights using a Verilog-A nonlinear memristor model [16].…”

“…Its closed-form expression for the current-voltage (I-V) curve (continuous and differentiable) and the recursive nature of the state variable computation based on the Krasnosel'skii-Pokrovskii hysteresis operator [34], makes it suitable for dealing with arbitrary input signals (continuous and discontinuous, differentiable and non-differentiable). Its applicability to the realistic circuital modelling of CPA-based Single (SLP) and Multi Layer Perceptrons (MLP) involving thousands of devices intended for the classification of large pattern datasets was recently demonstrated [14,15]. Although a much simpler approach than the more complex RRAM-based ANNs explored in the literature (MLP [15,19,36,37], Convolutional Neural Networks [38] -CNN-, Spike Neural Networks [39] -SNN-, etc.…”

“…Its applicability to the realistic circuital modelling of CPA-based Single (SLP) and Multi Layer Perceptrons (MLP) involving thousands of devices intended for the classification of large pattern datasets was recently demonstrated [14,15]. Although a much simpler approach than the more complex RRAM-based ANNs explored in the literature (MLP [15,19,36,37], Convolutional Neural Networks [38] -CNN-, Spike Neural Networks [39] -SNN-, etc. ), the SLP still allows studying and clarifying the ANN limitations caused by parasitic effects and non-idealities occurring in the synaptic layers implemented with CPAs.…”

Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults

“…In this regard, the closed-form expression for the I-V curve (continuous and differentiable) and the iterative nature of the state variable computation of the QMM makes it suitable for dealing with arbitrary input signals (continuous and discontinuous, differentiable and non-differentiable). Such is the case of its application to the realistic circuital modelling of CPA-based single and multi-layer perceptrons (SLPs and MLPs) involving thousands of devices intended for the classification of large pattern datasets, as recently demonstrated [28,42]. Although a much simpler approach than the more complex RRAM-based ANNs explored in the literature (MLPs, [43][44][45], convolutional neural networks [46] (CNNs), spike neural networks [47] (SNNs), etc.…”