Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults

Abstract

In this work, the effect of randomly distributed stuck-at faults (SAFs) in memristive cross-point array (CPA)-based single and multi-layer perceptrons (SLPs and MLPs, respectively) intended for pattern recognition tasks is investigated by means of realistic SPICE simulations. The quasi-static memdiode model (QMM) is considered here for the modelling of the synaptic weights implemented with memristors. Following the standard memristive approach, the QMM comprises two coupled equations, one for the electron transport based on the double-diode equation with a single series resistance and a second equation for the internal memory state of the device based on the so-called logistic hysteron. By modifying the state parameter in the current-voltage characteristic, SAFs of different severeness are simulated and the final outcome is analysed. Supervised ex-situ training and two well-known image datasets involving hand-written digits and human faces are employed to assess the inference accuracy of the SLP as a function of the faulty device ratio. The roles played by the memristor’s electrical parameters, line resistance, mapping strategy, image pixelation, and fault type (stuck-at-ON or stuck-at-OFF) on the CPA performance are statistically analysed following a Monte-Carlo approach. Three different re-mapping schemes to help mitigate the effect of the SAFs in the SLP inference phase are thoroughly investigated.

SPICE Implementation of the Dynamic Memdiode Model for Bipolar Resistive Switching Devices

“…In this regard, we aim to report the fundamentals and the SPICE implementation of a revised Dynamic Memdiode Model (DMM) for bipolar RS devices capable of incorporating the time-related dependencies, as well as the guidelines for its usage. Since this new version incorporates a dynamic balance equation for the memory state and a higher level of details in terms of modelling accuracy, we consider that it is a breakthrough with respect to the previous models proposed by our group: the Quasi-static Memdiode Model (QMM) [20][21][22] and a first version of the DMM [19]. The first one relies on the double-diode circuit controlled by the Krasnosel'skii-Pokrovskii hysteresis operator [23].…”

Simulation of the effect of material properties on yttrium oxide memristor-based artificial neural networks

“…When simulating the network accuracy as a function of the oxygen concentration and taking into account the device variability, no clear trend is observed regarding the oxygen concentration, with a variability of accuracy being almost oxidation independent for oxygen flows below 0.5 SCCM. On the other hand, the inference accuracy is much more severely affected for the stuck-at-ON faults rather than for the stuck-at-OFF faults, as reported in previous papers 53. To mitigate the effects of the inevitable stuck-at-faults, remapping techniques, such as those explored in our previous work,53 must be taken into account.The simulation results for the classification task are shown in Figs.8(d)-8(h) as a function of both the line resistance (RL) and read voltage (V read ), reporting both the accuracy and power consumption and showing their susceptibility to the electrical characteristics of the RRAM devices (which ultimately depend on the oxygen deficiency of the yttrium layer).…”

“…On the other hand, the inference accuracy is much more severely affected for the stuck-at-ON faults rather than for the stuck-at-OFF faults, as reported in previous papers. 53 To mitigate the effects of the inevitable stuck-at-faults, remapping techniques, such as those explored in our previous work, 53 must be taken into account.…”

Hardware implementation of memristor-based artificial neural networks

“…This procedure was successfully used to evaluate the accuracy, power dissipation, latency and other figures-of-merit of hardware-based neural networks during inference 250 , 253 . It also allows to study in detail the weight update process 254 and the mitigation of stuck-at-faults 255 . To speed up the simulation process, we rely for this implementation in the FastSPICE simulator from the Synopsys Design Suite, although it is perfectly compatible with standard H-SPICE.…”