Abstract:A method using a low-temperature Si (LT-Si) buffer layer is developed to grow a SiGe epilayer with low density of dislocations on a Si substrate by molecular-beam epitaxy. In this method, a LT-Si layer is used to release the stress of the SiGe layer. The samples have been investigated by x-ray double-crystal diffraction and transmission electron microscopy. The results indicate that the LT-Si is effective to release the stress and suppress threading dislocations.
“…Also, many threading dislocations are found to bow towards the substrate. This phenomenon is very similar to that observed in samples using graded layers [6] and LT Si layers [9,11] in order to release strain. If a thick uniform GeSi layer is directly grown on the Si substrate without any pregrown layer, a large amount of threading dislocations are generated throughout the alloy layer (see Fig.…”
Section: Methodssupporting
confidence: 80%
“…Recently, a method of growing a uniform-Ge-composition GeSi layer with a low-density of threading dislocations on a Si substrate by use of a low-temperature (LT) Si layer has been reported [9][10][11]. The growth temperature for the LT Si layer must be below 450 • C. This method can significantly reduce the buffer layer thickness and improve surface quality.…”
Section: Pacs: 8115ghmentioning
confidence: 98%
“…The growth temperature for the LT Si layer must be below 450 • C. This method can significantly reduce the buffer layer thickness and improve surface quality. For this technique, the introduction of a LT Si layer can be easily realized by solid-source molecular beam epitaxy(MBE) and Si 2 H 6 gas-source MBE [9][10][11]. However, for the widely used SiH 4 -source ultrahigh vacuum chemical vapor deposition (UHV/CVD) system, growth of a LT Si layer using SiH 4 introduces a new problem.…”
A new alternative method to grow the relaxed Ge 0.24 Si 0.76 layer with a reduced dislocation density by ultrahigh vacuum chemical vapor deposition is reported in this paper. A 1000-Å Ge 0.24 Si 0.76 layer was first grown on a Si(100) substrate. Then a 500-Å Si layer and a subsequent 5000-Å Ge 0.24 Si 0.76 overlayer followed. All these three layers were grown at 600 • C. After being removed from the growth system to air, the sample was first annealed at 850 • C for 30 min, and then was investigated by cross-sectional transmission electron microscopy and Rutherford backscattering spectroscopy. It is shown that the 5000-Å Ge 0.24 Si 0.76 thick over layer is perfect, and most of the threading dislocations are located in the embedded thin Si layer and the lower 1000-Å Ge 0.24 Si 0.76 layer. The relaxation ratio of the over layer is deduced to be 0.8 from Raman spectroscopy.
“…Also, many threading dislocations are found to bow towards the substrate. This phenomenon is very similar to that observed in samples using graded layers [6] and LT Si layers [9,11] in order to release strain. If a thick uniform GeSi layer is directly grown on the Si substrate without any pregrown layer, a large amount of threading dislocations are generated throughout the alloy layer (see Fig.…”
Section: Methodssupporting
confidence: 80%
“…Recently, a method of growing a uniform-Ge-composition GeSi layer with a low-density of threading dislocations on a Si substrate by use of a low-temperature (LT) Si layer has been reported [9][10][11]. The growth temperature for the LT Si layer must be below 450 • C. This method can significantly reduce the buffer layer thickness and improve surface quality.…”
Section: Pacs: 8115ghmentioning
confidence: 98%
“…The growth temperature for the LT Si layer must be below 450 • C. This method can significantly reduce the buffer layer thickness and improve surface quality. For this technique, the introduction of a LT Si layer can be easily realized by solid-source molecular beam epitaxy(MBE) and Si 2 H 6 gas-source MBE [9][10][11]. However, for the widely used SiH 4 -source ultrahigh vacuum chemical vapor deposition (UHV/CVD) system, growth of a LT Si layer using SiH 4 introduces a new problem.…”
A new alternative method to grow the relaxed Ge 0.24 Si 0.76 layer with a reduced dislocation density by ultrahigh vacuum chemical vapor deposition is reported in this paper. A 1000-Å Ge 0.24 Si 0.76 layer was first grown on a Si(100) substrate. Then a 500-Å Si layer and a subsequent 5000-Å Ge 0.24 Si 0.76 overlayer followed. All these three layers were grown at 600 • C. After being removed from the growth system to air, the sample was first annealed at 850 • C for 30 min, and then was investigated by cross-sectional transmission electron microscopy and Rutherford backscattering spectroscopy. It is shown that the 5000-Å Ge 0.24 Si 0.76 thick over layer is perfect, and most of the threading dislocations are located in the embedded thin Si layer and the lower 1000-Å Ge 0.24 Si 0.76 layer. The relaxation ratio of the over layer is deduced to be 0.8 from Raman spectroscopy.
“…It has been known for many years that dislocations play a significant role in heterostructures of strained-layer semiconductors both mechanically and electronically [1][2][3][4]. Due to the large mismatch (~4.2%) between Si and Ge, the growth of nearly dislocation-free SiGe films is a formidable challenge and many threading dislocations will exist in the epitaxial layers.…”
“…The direct growth of Ge on Si is hampered by 4.2% lattice mismatch resulting in high density of dislocations and surface roughness. Graded SiGe and superlattice buffer layers are shown to reduce the dislocation density [3]- [9]. Very high temperature molecular beam epitaxy growth is known to confine threading dislocation near the Ge/Si interface [10].…”
Abstract-Selective-area germanium (Ge) layer on silicon (Si) is desired to realize the advanced Ge devices integrated with Si very-large-scale-integration (VLSI) components. We demonstrate the area-dependent high-quality Ge growth on Si substrate through SiO 2 windows. The combination of area-dependent growth and multistep deposition/hydrogen annealing cycles has effectively reduced the surface roughness and the threading dislocation density. Low root-mean-square surface roughness of 0.6 nm is confirmed by atomic-force-microscope analysis. Low defect density in the area-dependent grown Ge layer is measured to be as low as 1 × 10 7 cm −2 by plan-view transmission-electron-miscroscope analysis. In addition, the excellent metal-semiconductor-metal photodiode characteristics are shown on the grown Ge layer to open up a possibility to merge Ge optoelectronics with Si VLSI.
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