Logic synthesis and testing techniques for switching nano-crossbar arrays

Abstract

Beyond CMOS, new technologies are emerging to extend electronic systems with features unavailable to silicon-based devices. Emerging technologies provide new logic and interconnection structures for computation, storage and communication that may require new design paradigms, and therefore trigger the development of a new generation of design automation tools. In the last decade, several emerging technologies have been proposed and the time has come for studying new ad-hoc techniques and tools for logic synthesis, physical design and testing. The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements logic, arithmetic, and memory elements by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of logic, arithmetic, and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of emerging computers beyond CMOS. The topic of this project can be considered under the research area of â\u80\u9cEmerging Computing Modelsâ\u80\u9d or â\u80\u9cComputational Nanoelectronicsâ\u80\u9d, more specifically the design, modeling, and simulation of new nanoscale switches beyond CMOS

Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices

“…Recent years have seen successful design of memory cores and programmable logic arrays and interconnects using nanotechnologies [4], [5]. Moreover, architectures and structures for the nano-electronic computation, realizing simple logic gates, such as NAND and NOR, and implementing complex logic circuits, such as adders and microprocessors, have been introduced [6], [7], [8], [9], [10].…”

Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling

“…It contributes to the construction of emerging computers by proposing nano-crossbar based computer architectures. In the first half of our four-year project, we have investigated different computing models suitable for the crossbar arrays by considering their effect on circuit performance in terms mostly of area, i.e., array size [1]- [4].…”

A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices

“…Over the years efficient structures, architectures, and techniques have been introduced to implement memory cores, programmable logic arrays and interconnects using nanotechnologies [1], [2]. Switching lattices have been proposed as key structures to synthesize logic functions, aiming to achieve significant gains on area, delay, and power consumption with respect to designs using traditional two-terminal switches [3], [4]. From a technological perspective, it is indicated in [3] that switching lattices fit perfectly in emerging technologies, such as nanowire and spin-wave crossbar structures and it is shown in [5] that the conventional CMOS technology can be used to implement switching lattices.…”