Leakage Current Distribution and Dielectric Breakdown of Cu-Contaminated Thin SiO[sub 2]

Abstract

Dielectric degradation of an intentionally Cu-contaminated SiO 2 film on a Si substrate was investigated using conducting atomic force microscopy and metal-oxide-semiconductor capacitors. Comparison of the results of both measurements clarified that local oxide leakage currents increased at random points except at the Cu particles. At the Cu particles, accelerated thermal oxidation leads to the formation of a thick SiO 2 layer at the interface with the Si substrate and suppression of the oxide leakage current. A combination of electrical evaluations and total reflection X-ray fluorescence analyses indicated that a high Cu concentration on a SiO 2 surface induced low-voltage dielectric breakdown, and a low Cu concentration inside the SiO 2 film induced high leakage current in a low electric field range.A continuous decrease in the gate oxide thickness of metaloxide-semiconductor ͑MOS͒ systems is inevitable in current ultralarge-scale integrated circuits ͑ULSIs͒. Ultrathin gate oxide with uniform thickness within a large-diameter wafer can be easily formed with either a low oxidation temperature or a short oxidation time. 1 However, it is difficult to establish an ultrathin gate oxide technology in the ULSI manufacturing process with high device yield and high reliability. 2,3 This is because both the yield and longterm reliability of the thin gate oxide are easily deteriorated by crystal originated particles 4 or bulk microdefects 5 in the Si wafer or by such phenomena as charge-up 6,7 and radiation 8 during ULSI manufacturing processes. In addition, one of the most problematic causes of reliability degradation in ULSI manufacturing is unintentional contamination such as by metal and organic matter. In particular, care should be taken to prevent contamination with metallic impurities with high diffusivity in all process steps. 2,3,9,10 The scaling of devices to submicrometer dimensions has constrained ULSI performance because of the RC (resistance ϫ capacitance) delay interconnection. The resistance of interconnection wiring can be lowered by choosing alternative conductor materials such as Cu, Ag, or other new materials. The purity of such materials is still low in comparison with those of other materials used in ULSIs. In adopting such materials, attention should be paid to not only the main elements but also the impurities. Cu with low resistivity and a cost advantage is profitable as a low-resistance interconnection material. However, the diffusivity of Cu is high in SiO 2 11 and Si. 12 For example, the diffusion length at 600°C for 60 min in Si is approximately 2 mm, 12 which is more than the Si wafer thickness. That is, even Cu atoms adsorbed at the back surface of the Si wafers during the manufacturing process may degrade the functions of ULSIs. In addition, the electronegativity of Cu is higher than that of Si. 13 Immersion in a diluted hydrofluoric acid ͑DHF͒ solution before the gate oxidation easily causes the adsorption of Cu on the bare Si surface. 14 In many of the previous studies, deterioration by t...

The influence of irradiation on the microhardness and photoluminescence of SiO2

“…A comparison of the X-ray diffraction patterns, the experimental data on the microhardness, the absorption spectra [13], and the photoluminescence spectra before and after irradiation (at a dose of 10 4 Gy) of the glass substrate with the composite coating involving the BaTiO 3 crystal film demonstrates that an increase in the microhardness of the coating (at small loads) correlates with the quenching of the red luminescence due to the defects of dangling bonds (nonbridging oxygen atoms O -) and with the increase in the intensity of the excitonic UV luminescence of the undamaged network [13]. This confirms the healing of Si-O dangling bonds, which leads to an increase in the microhardness and a decrease in the leakage current and dielectric losses [4][5][6]. Figure 9 shows the photoluminescence spectra of the uviol glass.…”

“…Metal-oxide-semiconductor field-effect transistors, metal oxide capacitors, and solar cells involve thin oxide layers, as a rule, composed of SiO 2 , whose mechanical strength and electrical insulation characteristics are close to a limit [1][2][3][4][5][6]. Oxide layers can appear to be most sensitive to radiation that has an effect on devices intended for the investigation of the interplanetary space; on instruments used in communication, metrology, navigation, satellite observations, and nuclear power plants; and on high-energy particle detectors.…”

A Highly Sensitive Determination of Bulk Cu and Ni in Heavily Boron-doped Silicon Wafers

“…Nano-scale device processes having a low thermal budget are more sensitive to metal contamination than previous processes [1][2][3][4] and are particularly susceptible to Cu and Ni, which are considered to be detrimental to the performance of these devices. [5][6][7][8][9][10][11][12][13][14] However, progress on the metrology for analysis of bulk Cu and Ni has been relatively slow. Due to lack of commercially available bulk metal standards and poor recovery yield in heavily boron-doped silicon wafers, analytical accuracy and precision cannot, so far, be guaranteed.…”

Low-Frequency Noise Assessment of CMOS Transistors with a Through-Silicon Via

“…For example, backside Cu contamination of the thinned stacked chip may impact on the transistor parameters or reliability (5)(6)(7). Copper atoms easily diffuse through SiO 2 and may create traps at the interface or in the oxide, which can degrade the gate oxide quality and breakdown (8)(9)(10)(11)(12)(13)(14)(15)(16)(17). Back-side gettering schemes, relying on the presence of back-side damage are generally helpful in the control of copper in-diffusion (18).…”