Lateral High-Speed Bipolar Transistors on SOI for RF SoC Applications

Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device

“…However, CMOS fabrication favors lateral bipolar transistor concepts [1][2][3][4][5][6] on SOI since it is easier to tune the SOI layer properties to optimize the CMOS devices without degrading the performance of the bipolar devices [2]. Realization of a true low cost complementary-BiCMOS process is possible only when the lateral bipolar transistors can be fabricated on CMOS using simple fabrication steps with low thermal budgets.…”

A high current gain gate-controlled lateral bipolar junction transistor with 90nm CMOS technology for future RF SoC applications

“…However, for radio frequency (RF) applications, BJT is still superior to MOSFET for its well-behaved characteristics. Thus, many BJT based novel devices such as SiGe HBT, SiGe BiCMOS [1][2][3], and SOI lateral BJT [8][9][10] have been developed. Nevertheless, these devices suffer also the drawback of complicated fabrication processes, and thus resulting in a high preparing cost.…”

RF Model of Lateral Bipolar Junction Transistor on Silicon-on-Insulator Substrate

“…The figure shows that the resistive path from the base metal contact to the intrinsic base resistance, RB(int), is comprised of the base-poly resistance RB(POlY), resistance due to the PSWS RB(PSWS), and resistance of the p+ region, RB(P+): RB = RB(int) + RB(P+) + RB(PSWS) + RB(POlY) (1) The resistance of the base-poly and the PSWS and the p+ region can be calculated from the device geometry RB(POlY) = RS(pol hpoLy (2) RB(PSWS) hRS(PS s) LE (3) RB(P+) RS(P+) LE (4) where RS(poIy), Rs(psws), and Rs(p+) are the sheet resistances of the base-poly, PSWS, and p+ region respectively. As none of these extrinsic resistances change with bias, they are are represented by Rbb extemal to the SGP model: Rbb = RB(p+) + RB(PSWS) + RB(POIY) (5) In Figure 1, there are several capacitances unique to the LBJT that must be modelled.…”

“…This has already been implemented in a commercial CMOS technology [3] for microprocessors. The successful implementation of the lateral BJT on SOI [4] is a critical step towards the realization of a true complementary-BiCMOS processenabling low cost, high speed, RF and mixed-signal SoC designs. Successful modelling of the lateral bipolar device is also required in order to achieve operational circuit designs.…”

“…Only the work in [7] addresses RF modelling for LBJTs. This paper describes a unique methodology used to model the novel LBJT [4] using a modified Spice Gummel-Poon (SGP) model. New components are added to the model based on the device's physical geometry.…”