Laser spike annealing and its application to leading-edge logic devices

Abstract

Laser spike annealing (LSA) is a disruptive technology which has been successfully demonstrated for advanced junction engineering-creating highly activated ultra-shallow junctions with near diffusion-less boundaries. These produce higher performing devices with improved drive currents and/or lower leakage currents, and provide design engineers more opportunities for product enhancements. LSA has become the "process of record" for a majority of the industry's high-performance, logic device manufacturers.LSA produces more uniform temperature and stress distributions in product wafers than lamp-based short time annealing processes. Furthermore, LSA is compatible with new materials such as strained Si, SiGe, high-k and metal gates, and is extendable to new device structures. This paper will review the current LSA capabilities, process and integration methods, summarize its unique capabilities to reduce temperature-induced stress and misalignment, and discuss future opportunities both in junction engineering and other integration areas.

Extraordinary Magnetoresistance of Laserannealed Nano Boron Depositedon Oxidized Porous Silicon

“…I. Surface morphology: The laser annealing process can alter the surface morphology of the nano boron deposited on the porous oxide silicon, decreasing the forward and reverse currents due to the nano boron particles fusing or aggregate, creating areas of high resistance that can impact charge transport [18].…”

(Invited)Laser Annealing in CMOS Manufacturing

“…Importantly, the sign of pattern effect is inverted for flash lamp and LSA for some layout environments such as "MinAA_MinPC" (corresponding to maximum density of exposed STI) and "FET array". This sign inversion is a unique feature of LSA design that employs p-polarized far infrared laser beam coupled at near the Brewster's angle of silicon (21).…”

“…While the observed range of LSA pattern effects remained similar to that observed on the bulk substrates, the range of fRTP pattern effects is larger and is driven by those environments that have the inverted sign with respect to LSA pattern effects, namely, FET arrays and dummy fill structures. This exaggerated layout response on reflective SOI substrates limits the annealing temperature range for flash lamps and laser annealing tools without special laser beam coupling schemes (21). The pattern effects are less restrictive on bulk Figure 9.…”

Stress Characterization of Selective Epitaxial Si1-xGex Deposition for Embedded Source/Drain Before and After Millisecond Laser Anneal

“…This observation is fully in agreement with previous results (2,10), which revealed lower presence of slip formation by shortening the annealing time or in other words by increasing the strain rate. Haasen's model (10,11) relates the yield stress σ E with the strain rate as:…”