Key parameters affecting STT-MRAM switching efficiency and improved device performance of 400°C-compatible p-MTJs

Hu, G.; Gottwald, Matthias; He, Qing; Park, J. H.; Lauer, G.; Nowak, Janusz; Brown, S. L.; Doris, B.; Edelstein, D.; Evarts, Eric R.; Hashemi, Pouya; Khan, Babar A.; Kim, Y. H.; Kothandaraman, C.; Marchack, Nathan; O’Sullivan, E. J.; Reuter, M. C.; Robertazzi, R. P.; Sun, J. Z.; Suwannasiri, T.; Trouilloud, P. L.; Zhu, Yu; Worledge, D. C.

doi:10.1109/iedm.2017.8268515

Cited by 18 publications

(7 citation statements)

References 2 publications

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“…42 In cases, where MTJs are utilized to drive complex circuits, much lower thickness of the MgO layer will ensure the proper scaling of the device. 43 Moreover, a higher TMR 44 of the MTJs will increase the signal-to-noise ratio between the individual states.…”

Section: Nano Lettersmentioning

confidence: 99%

“…However, the thickness of the MgO barrier should be 1.6–1.8 nm for a scaled MTJ of 20 nm × 10 nm, considering the resistance-area product . In cases, where MTJs are utilized to drive complex circuits, much lower thickness of the MgO layer will ensure the proper scaling of the device . Moreover, a higher TMR of the MTJs will increase the signal-to-noise ratio between the individual states.…”

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confidence: 99%

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Magnetic Domain Wall Based Synaptic and Activation Function Generator for Neuromorphic Accelerators

et al. 2019

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Magnetic domain walls are information tokens in both logic and memory devices, and hold particular interest in applications such as neuromorphic accelerators that combine logic in memory. Here, we show that devices based on the electrical manipulation of magnetic domain walls are capable of implementing linear, as well as programmable nonlinear, functions. Unlike other approaches, domain-wall-based devices are ideal for application to both synaptic weight generators and thresholding in deep neural networks. Prototype micrometer-size devices operate with 8 ns current pulses and the energy consumption required for weight modulation is ≤ 16 pJ. Both speed and energy consumption compare favorably to other synaptic nonvolatile devices, with the expected energy dissipation for scaled 20-nm-devices close to that of biological neurons. Deep neural networks 1, 2 mimic the synaptic and activation functionality of human neurons using repeated applications of linear filters interspersed by nonlinear decision functions. Among other applications, deep neural networks offer promising solutions to image 3 , speech 4 and video 5recognition. Training is performed using a backpropagation learning procedure 6 , with the filter weights updated continuously like synapses, until the calculated output matches the desired output.

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Section: Nano Lettersmentioning

confidence: 99%

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confidence: 99%

Magnetic Domain Wall Based Synaptic and Activation Function Generator for Neuromorphic Accelerators

et al. 2019

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“…In addition, tunnel magnetoresistance (TMR)-based read schemes require a high TMR for fast reading, and thus are limited to the interfacial CoFeB/MgO system, which in turn results in a limited scope for materials exploration. As a result, most efforts in write current reduction have focused on optimizing the conventional dual MgO-based composite FL stack with spacer and cap layer engineering [6,[15][16][17][18][19].…”

Section: Introductionmentioning

confidence: 99%

A Systematic Assessment of W-Doped CoFeB Single Free Layers for Low Power STT-MRAM Applications

et al. 2021

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Spin-transfer torque magnetoresistive random access memory (STT-MRAM) technology is considered to be the most promising nonvolatile memory (NVM) solution for high-speed and low power applications. Dual MgO-based composite free layers (FL) have driven the development of STT-MRAMs over the past decade, achieving data retention of 10 years at the cost of higher write power consumption. In addition, the need for tunnel magnetoresistance (TMR)-based read schemes limits the flexibility in materials beyond the typical CoFeB/MgO interfaces. In this study, we propose a novel spacerless FL stack comprised of CoFeB alloyed with heavy metals such as tungsten (W) which allows effective modulation of the magnet properties (Ms, Hk) while retaining compatibility with MgO layers. The addition of W results favours a delayed crystallization process, in turn enabling higher thermal budgets up to 180 min at 400 °C. The presence of tungsten reduces the total FL magnetization (Ms) but simultaneously increasing its temperature dependence, thus, enabling a dynamic write current reduction of ~15% at 2 ns pulse widths. Reliable operation is demonstrated with a WER of 1 ppm and endurance >1010 cycles. These results pave the way for alternative designs of STT-MRAMs for low power electronics.

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“…Figure 1 summarizes device and circuit conference publications relating to eNVMs from 2016 to 2020 [3,4,5,6,7,8,10,12,13,14,16,18,19,22,23,24,25,27,28,29,30,31,32,34,35,36,39,41,42,43,44,45,46,47,48,49,50,51,52,53,54,57,58,59,60,61,62,64,65,66,67,68,…”

Section: Introductionmentioning

confidence: 99%

NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories

Pentecost¹,

Hankin²,

Donato³

et al. 2021

Preprint

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Repeated off-chip memory access to DRAM drive up operating power for data-intensive applications, and SRAM technology scaling and leakage power limits the efficiency of embedded memories. Future on-chip storage will need higher density and energy efficiency, and the actively expanding field of emerging, embeddable non-volatile memory (eNVM) technologies is providing many potential candidates to satisfy this need. Each technology proposal presents distinct trade-offs in terms of density, read, write, and reliability characteristics, and we present a comprehensive framework for navigating and quantifying these design trade-offs alongside realistic system constraints and application-level impacts. This work evaluates eNVM-based storage for a range of application and system contexts including machine learning on the edge, graph analytics, and general purpose cache hierarchy, in addition to describing a freely available (http://nvmexplorer.seas.harvard.edu/) set of tools for application experts, system designers, and device experts to better understand, compare, and quantify the next generation of embedded memory solutions.

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Key parameters affecting STT-MRAM switching efficiency and improved device performance of 400°C-compatible p-MTJs

Cited by 18 publications

References 2 publications

Magnetic Domain Wall Based Synaptic and Activation Function Generator for Neuromorphic Accelerators

Magnetic Domain Wall Based Synaptic and Activation Function Generator for Neuromorphic Accelerators

A Systematic Assessment of W-Doped CoFeB Single Free Layers for Low Power STT-MRAM Applications

NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories

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