We study high-field electrical breakdown and heat dissipation from carbon nanotube (CNT) devices on SiO 2 substrates. The thermal "footprint" of a CNT caused by van der Waals interactions with the substrate is revealed through molecular dynamics (MD) simulations. Experiments and modeling find the CNT-substrate thermal coupling scales proportionally to CNT diameter and inversely with SiO 2 surface roughness (~d/Δ). Comparison of diffuse mismatch modeling (DMM) and data reveals the upper limit of thermal coupling ~0.4 WK -1 m -1 per unit length at room temperature, and ~0.7 WK -1 m -1 at 600 o C for the largest diameter (3-4 nm) CNTs. We also find semiconducting CNTs can break down prematurely, and display more breakdown variability due to dynamic shifts in threshold voltage, which metallic CNTs are immune to; this poses a fundamental challenge for selective electrical breakdowns in CNT electronics.

We describe a pulsed measurement technique for suppressing hysteresis for carbon nanotube (CNT) device measurements in air, vacuum, and over a wide temperature range (80-453 K). Varying the gate pulse width and duty cycle probes the relaxation times associated with charge trapping near the CNT, found to be up to the 0.1-10 s range. Longer off times between voltage pulses enable consistent, hysteresis-free measurements of CNT mobility. A tunneling front model for charge trapping and relaxation is also described, suggesting trap depths up to 4-8 nm for CNTs on SiO2. Pulsed measurements will also be applicable for other nanoscale devices such as graphene, nanowires, or molecular electronics, and could enable probing trap relaxation times in a variety of material system interfaces.

Spintronic computing promises superior energy efficiency and nonvolatility compared to conventional field-effect transistor logic. But, it has proven difficult to realize spintronic circuits with a versatile, scalable device design that is adaptable to emerging material physics. Here we present prototypes of a logic device that encode information in the position of a magnetic domain wall in a ferromagnetic wire. We show that a single three-terminal device can perform inverter and buffer operations. We demonstrate one device can drive two subsequent gates and logic propagation in a circuit of three inverters. This prototype demonstration shows that magnetic domain wall logic devices have the necessary characteristics for future computing, including nonlinearity, gain, cascadability, and room temperature operation.

Magnetic domain walls are information tokens in both logic and memory devices, and hold particular interest in applications such as neuromorphic accelerators that combine logic in memory. Here, we show that devices based on the electrical manipulation of magnetic domain walls are capable of implementing linear, as well as programmable nonlinear, functions. Unlike other approaches, domain-wall-based devices are ideal for application to both synaptic weight generators and thresholding in deep neural networks. Prototype micrometer-size devices operate with 8 ns current pulses and the energy consumption required for weight modulation is ≤ 16 pJ. Both speed and energy consumption compare favorably to other synaptic nonvolatile devices, with the expected energy dissipation for scaled 20-nm-devices close to that of biological neurons. Deep neural networks 1, 2 mimic the synaptic and activation functionality of human neurons using repeated applications of linear filters interspersed by nonlinear decision functions. Among other applications, deep neural networks offer promising solutions to image 3 , speech 4 and video 5recognition. Training is performed using a backpropagation learning procedure 6 , with the filter weights updated continuously like synapses, until the calculated output matches the desired output.

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