2013
DOI: 10.1109/led.2013.2258652
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Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

Abstract: Inverters based on uniaxially tensile strained Si (sSi) nanowire (NW) tunneling field-effect transistors (TFETs) are fabricated. Tilted dopant implantation using the gate as a shadow mask allows self-aligned formation of p-i-n TFETs. The steep junctions formed by dopant segregation at low temperatures improve the band-to-band tunneling, resulting in higher oncurrents of n- and p-TFETs of >10 μA/μm at VDS = 0.5 V. The subthreshold slope for n-channel TFETs reaches a minimum value of 30 mV/dec, and is <60 mV/dec… Show more

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Cited by 183 publications
(105 citation statements)
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“…Recently, many demonstrations of TFET operations for various device structures and various materials have been reported. Figure 18 shows relationships between I ON and I OFF for various TFETs with Si, Ge, and Ge 1−x Sn x channels [149][150][151][152][153][154][155][156][157][158][159][160]. The blue square is the target region for switching devices in a low-power consumption system.…”
Section: Electronic Device Applicationsmentioning
confidence: 99%
“…Recently, many demonstrations of TFET operations for various device structures and various materials have been reported. Figure 18 shows relationships between I ON and I OFF for various TFETs with Si, Ge, and Ge 1−x Sn x channels [149][150][151][152][153][154][155][156][157][158][159][160]. The blue square is the target region for switching devices in a low-power consumption system.…”
Section: Electronic Device Applicationsmentioning
confidence: 99%
“…Several device architectures and materials are being investigated to develop Tunnel FETs offering both an attractive on current and a small SS, including III-V based transistors possibly employing staggered or broken bandgap heterojunctions [6][7][8][9] , or strain engineering 10 . Even if encouraging experimental results have been reported for the on-current in III-V Tunnel FETs, to achieve a sub 60 mV/dec subthreshold swing is still a real challenge in these devices, probably due to the detrimental effects of interface states 6,11,12 .…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, from today's point of view TFET are alternatives for low operating power. Recently, encouraging results have been shown demonstrating a performance that is coming close to the requirements for an actual implementation [82,83]. In a recent publication [84] the combination of a junctionless transistor and a tunnel FET is described, combining features of both device types.…”
Section: Electron Devices Based On Silicon Nanowiresmentioning
confidence: 81%