Interface studies of GaAs metal-oxide-semiconductor structures using atomic-layer-deposited HfO2∕Al2O3 nanolaminate gate dielectric

Abstract

A systematic capacitance-voltage study has been performed on GaAs metal-oxide-semiconductor (MOS) structures with atomic-layer-deposited HfO2∕Al2O3 nanolaminates as gate dielectrics. A HfO2∕Al2O3 nanolaminate gate dielectric improves the GaAs MOS characteristics such as dielectric constant, breakdown voltage, and frequency dispersion. A possible origin for the widely observed larger frequency dispersion on n-type GaAs than p-type GaAs is discussed. Further experiments show that the observed hysteresis is mainly from the mobile changes and traps induced by HfO2 in bulk oxide instead of those at oxide/GaAs interface.

Studies on Al/ZrO2/GaAs metal-oxide-semiconductor capacitors and determination of its electrical parameters in the frequency range of 10 kHz–1 MHz

“…For example, Shahrjerdi et al 5 reported hysteresis values of 380 and 430 mV, respectively, with as-deposited Al 2 O 3 on hydroxylated and sulfur-passivated GaAs. The hysteresis voltages with HfO 2 and HfO 2 / Gd 2 O 3 on p-GaAs were found to be 300 and 200 mV, respectively, as reported by Dalapati et al 13 However, the lowest value of hysteresis with Al 2 O 3 was mentioned to be 100 mV by Yang et al 14 So, the efficacy of sulfur passivation on p-GaAs with ZrO 2 as a high-k dielectric for GaAs MOS devices with a hysteresis of 150 mV, as observed in the present study, is noteworthy.…”

Electrical Properties of HfTiON Gate-Dielectric GaAs Metal-Oxide-Semiconductor Capacitor With AlON as Interlayer

“…All these indicate that the presence of an AlON IPL on the sulfur-passivated GaAs surface effectively reduces the formation of weak Ga-O, As-As, and especially As-O bonds, and thus suppresses the formation of a low-k interfacial layer on the GaAs surface, leading to large accumulation capacitance and small CET. Therefore, the AlON IPL can effectively reduce the density of defective states in the bandgap of GaAs caused by a considerable amount of As-O, As-As, and Ga-O bonds and eliminate the Femi-level pinning at the GaAs/AlON interface [25]- [27], thus resulting in small flatband-voltage shift and low gate leakage current as shown in Figs. 1 and 3, respectively.…”

Room temperature electrical properties of Bi0.7Dy0.3FeO3 thin films deposited by PLD on ZnO films for potential applications

“…For example, K. Prashanthi [14,15] reported increment in Memory window from 100 mV to 800 mV, in this experiment they deposited thin film of dielectric BDFO directly on Si wafer [8] and Shahrjerdi reported hysteresis values of 375 and 425 mV, respectively [44,46]. Dalapati mentioned the hysteresis voltages with HfO 2 and HfO 2 /Gd 2 O 3 on p-GaAs were found to be 300 and 200 mV, respectively [44] However, the lowest value of hysteresis with Al2O 3 was reported as 105 mV by Yang [46]. where C ox is the oxide capacitance, t ox is the thickness of the oxide layer, A is the area of the electrode, and is the free space permittivity.…”