Influence of substrate freeze-out on the characteristics of MOS transistors at very low temperatures

Balestra, F.; Audaire, Luc; Lucas, C.

doi:10.1016/0038-1101(87)90190-0

Cited by 87 publications

(25 citation statements)

References 7 publications

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“…• Incomplete ionization or substrate freeze-out In a MOSFET in thermal equilibrium (no voltage applied) dopant atoms will become deionized at a sufficiently low (cryogenic) temperature depending on the doping concentration in the range 10 12 to 10 18 cm −3 [34,35,36,37]. An overview of the freeze-out critical temperatures for each doping concentration in this range in silicon can be found in [28].…”

Section: Low-temperature Phenomenamentioning

confidence: 99%

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

Beckers

Jazaeri

Bohuslavskyi

et al. 2019

Solid-State Electronics

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This paper presents an extensive characterization and modeling of a commercial 28-nm FDSOI CMOS process operating down to cryogenic temperatures. The important cryogenic phenomena influencing this technology are discussed. The low-temperature transfer characteristics including body-biasing are modeled over a wide temperature range (room temperature down to 4.2 K) using the design-oriented simplified-EKV model. The trends of the free-carrier mobilities versus temperature in long and short-narrow devices are extracted from dc measurements down to 1.4 K and 4.2 K respectively, using a recently-proposed method based on the output conductance. A cryogenic-temperature-induced mobility degradation is observed on long pMOS, leading to a maximum hole mobility around 77 K. This work sets the stage for preparing industrial design kits with physicsbased cryogenic compact models, a prerequisite for the successful co-integration of FDSOI CMOS circuits with silicon qubits operating at deep-cryogenic temperatures.The birth of CMOS-compatible qubits in silicon [1,2,3,4] has rebooted the interest in cryogenic CMOS electronics for computing applications. Since the 1970s, MOSFET devices have been under investigation at cryogenic temperatures for use in custom applications, such as low-noise scientific equipment, spacecraft, power conversion etc. [5,6,7,8,9]. However, despite its many benefits for reaching high-performance and low-power computing [10], cryogenic cooling did not stay into practice for computing, abandoning the trend set by the ETA-10 liquid-nitrogen-cooled supercomputer [11].Nowadays, co-integrating qubits and CMOS circuits on the same substrate can greatly aid the development of scalable quantum computers featuring massive parallelism and error correction [12,13,14]. In this context, a silicon-on-insulator (SOI) platform is particularly attractive since the back gate provides additional control over the electron-spin qubit, trapped under the front gate of a SOI (nanowire) MOSFET[12,15,16]. To integrate the control circuits with quantum devices working at deep-cryogenic temperatures, regular SOI MOSFETs need to demonstrate reliable digital, analog and RF functionalities at such low temperatures. Using SOI cryogenic control electronics, the back gate can prove a useful tool to control the threshold voltage and hence the power consumption in circuits integrated close to the qubits [17], benefiting qubit coherence time by lowering generated noise. The main focus is on advanced ultra-thin body fully-depleted SOI (FDSOI) technology, e.g., the 28-nm node, to enable ultimate scalability of the resulting hybrid quantum-classical system [16,18].The 28-nm node, presently considered the ideal node for analog and RF applications at room temperature [19], has recently been tested for digital and analog functionality down to liquid-helium temperature (4.2 K) [17], and millikelvin temperature (20 mK) [20]. The improvement in RF characteristics has been verified down to liquid-nitrogen temperature (77 K) [21]. In addition to device c...

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Section: Low-temperature Phenomenamentioning

confidence: 99%

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

Beckers

Jazaeri

Bohuslavskyi

et al. 2019

Solid-State Electronics

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“…13) [8,9]. This phenomenon, which is analogous to the so-caHed "kink" in SOl devices, is ascribed to the self-polarization ofthe bulk due to the majority carriers flowing from the body to the source.…”

Section: Kink Phenomenamentioning

confidence: 91%

“…This phenomenon gives rise to the self-biasing of the substrate and in turn to the forward polarization of the source-substrate diode. The shift in the bulk bias Vb induces a further change of the threshold voltage, which explains the leveling of the drain current in saturation [8][9][10]41]. …”

Section: Kink Phenomenamentioning

confidence: 98%

Device Physics and Electrical Performance of Bulk Silicon Mosfets

Ghibaudo¹

2001

Device and Circuit Cryogenic Operation for Low Temperature Electronics

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“…Dopants in the source and drain contacts can be assumed completely ionized at all times due to heavy doping effects [59], [60]. 'Freezeout' or thermal de-ionization of the dopants in the non-degenerately doped MOSFET body [61] can be included in the Poisson-Boltzmann equation simply by replacing N A with N A × P (T, N A ) (where N A is the dopant concentration and P (T, N A ) the ionization probability, con- sidering an n-channel MOSFET). The ionization probability follows from semiconductor statistics: P (T, N A ) is given by the Fermi-Dirac occupation probability f (E) of the acceptor energy level E A .…”

Section: Mosfet Modeling At Cryogenic Temperaturesmentioning

confidence: 99%

A Review on Quantum Computing: From Qubits to Front-end Electronics and Cryogenic MOSFET Physics

Jazaeri

Beckers

Tajalli

et al. 2019

2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems"

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Quantum computing (QC) has already entered the industrial landscape and several multinational corporations have initiated their own research efforts. So far, many of these efforts have been focusing on superconducting qubits, whose industrial progress is currently way ahead of all other qubit implementations. This paper briefly reviews the progress made on the silicon-based QC platform, which is highly promising to meet the scale-up challenges by leveraging the semiconductor industry. We look at different types of qubits, the advantages of silicon, and techniques for qubit manipulation in the solid state. Finally, we discuss the possibility of co-integrating silicon qubits with FET-based, cooled front-end electronics, and review the device physics of MOSFETs at deep cryogenic temperatures.

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Influence of substrate freeze-out on the characteristics of MOS transistors at very low temperatures

Cited by 87 publications

References 7 publications

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

Device Physics and Electrical Performance of Bulk Silicon Mosfets

A Review on Quantum Computing: From Qubits to Front-end Electronics and Cryogenic MOSFET Physics

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