2014
DOI: 10.1088/0957-4484/25/46/465302
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Influence of nanoscale faceting on the tunneling properties of near broken gap InAs/AlGaSb heterojunctions grown by selective area epitaxy

Abstract: We report on the selective area molecular beam epitaxy of InAs/AlGaSb heterostructures on a GaSb (001) substrate. This method is used to realize Esaki tunnel diodes with a tunneling area down to 50 nm × 50 nm. The impact of the size reduction on the peak current density of the diode is investigated, and we show how the formation of the InAs facets can deeply affect the band-to-band tunneling properties of the heterostructure. This phenomenon is explained by the surface-dependent incorporation of Si dopant duri… Show more

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Cited by 26 publications
(45 citation statements)
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“…1h). Therefore, a highly doped n + /p + heterojunction can easily be implemented by forming a broken-gap band alignment without using a separate doping process, such as electrostatic doping by gate bias or chemical doping, which is generally required in a type-II heterojunction to realize a NDR device2346733343536.…”
Section: Resultsmentioning
confidence: 99%
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“…1h). Therefore, a highly doped n + /p + heterojunction can easily be implemented by forming a broken-gap band alignment without using a separate doping process, such as electrostatic doping by gate bias or chemical doping, which is generally required in a type-II heterojunction to realize a NDR device2346733343536.…”
Section: Resultsmentioning
confidence: 99%
“…Recently, negative differential resistance (NDR) devices have attracted considerable attention owing to their folded current–voltage ( I – V ) characteristic (N-shaped I – V curve), which presents multiple threshold voltage values123456789101112131415161718192021222324252627. Because of this remarkable property, studies associated with the NDR devices have been explored for realizing multi-valued logic (MVL) applications17111326.…”
mentioning
confidence: 99%
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“…This allows a higher ratio of on-current to off-current (I on /I off ) at reduced operating voltage V dd (o0.5 V) as compared to the state of the art FinFET devices which are considered nowadays key in power consumption scaling [3]. Major studies are pointing towards III-V hetero configurations as ideal material systems in order for TFET to be competitive with MOSFET [1][2][3][4][5][6][7][8][9][10]. However, III-V TFET still show inconsistency in measured vs. simulated I on /I off and subthreshold characteristics [2].…”
Section: Introductionmentioning
confidence: 99%