In-plane-gate transistors on nonepitaxial silicon directly written by focused-ion-beam implantation

Abstract

It is demonstrated that focused-ion-beam written in-plane-gate transistors, working at room temperature can be realized on (100) silicon-on-insulator wafers, separated by implanted oxygen, without the need for epitaxial growth processes. Typical channel widths are in the sub-μm range. Their electrical features at room temperature are characterized by transport and Hall measurements. The channel current is measured as a function of the geometrical channel width and the implanted dose. Activation of the implanted gallium by rapid thermal annealing changes the character of the insulating lines from Ohmic barriers to npn-junctions. Consequently the leakage current across the barriers decreases significantly, the direct current output characteristics of the transistors are improved with higher implantation doses and smaller geometrical channel widths are achievable.

24.3: In‐Plane‐Gate Transistors for AMLCD

“…The pre-structured wafers are transferred into the FIB machine and are patterned by beam-deflection and a step-and-repeat routine with Gallium (Ga). Typically Ga is activated by rapid thermal annealing at 650°C for 10 s in a nitrogen atmosphere, forming lateral n-p-n barriers by locally overcompensating the n doping [7]. Finally, after bonding the mesas, the direct current characteristics of transistors are studied with a semiconductor parameter analyzer at room temperature.…”

Direct writing of active loads by focused ion beams

“…The constriction is tunable by the adjacent in-plane-gate ͑IPG͒ and shows current-voltage characteristics like a fieldeffect transistor. 7 It is worth noting that this transistor concept does not depend on a particular semiconductor material and has up to now been realized in Al x Ga 1Ϫx As/GaAs heterostructures, 7 In x Ga 1Ϫx As/GaAs quantum wells, 6 SiGe heterostructures, 8 nonepitaxial silicon-on-insulator, 5 and on standard bulk silicon. 9 For these experiments, FIB techniques have been used as well as homogeneous ion implantation through opened resist windows, deep mesa etching 10 and laser induced local diffusion.…”

“…In GaAs, the implanted Ga ions induce deep impurity levels or even p-type doping, 4 whereas Ga is a reasonable p-type dopant in Si. 5 Due to this introduction of deep levels in GaAs, the implanted Ga serves to deplete the electron density without being thermally activated, although thermal activation should be a standard step in semiconductor processing.…”

The Doping of Si p‐Field‐Effect Transistor Devices by Gallium Focused Ion Beam Implantation Enabling Flexible Fabrication Routes at Moderate Temperatures

“…It brings superior design flexibility, allows structures in the 100 nm range, and eliminates photomask purchasing costs. In this regard, bipolar transistors, [ 8 ] junction gate field‐effect transistors (JFETs), [ 9 ] in‐plane gate transistors, [ 10 ] and also metal‐oxide‐semiconductor field‐effect transistors (MOSFETs) [ 11 ] have already been realized using a Ga FIB tool. However, electrical data of the MOSFETs have not been shown by Wanzenboeck et al, [ 11 ] and the same applies to an insight into a possible integration flow for the fabrication of the p‐field‐effect transistor (FET).…”