In-line E-beam metrology and defect inspection: industry reflections, hybrid E-beam opportunities, recommendations and predictions

Solecky, Eric; Rasafar, Allen; Cantone, Jason; Bunday, Benjamin; Vaid, Alok; Patterson, Oliver D.; Stamper, A. K.; Wu, Kevin; Buengener, Ralf; Weng, Wen Jian; Dai, Xintuo

doi:10.1117/12.2261524

Cited by 7 publications

(10 citation statements)

References 11 publications

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“…2a,b,c) 49,53 . SEMs are also used with other techniques 47,5354 (see hybrid metrology below) to obtain information on parts of a feature that cannot be measured directly. SEM is used for overlay measurements, and high voltage SEM has been proposed as a viable candidate for overlay of buried layers 47,55 ; and contour metrology, where the required information are planar two-dimensional profiles used to verify optical proximity correction 56,57…”

Section: Advanced Metrology Techniquesmentioning

confidence: 99%

“…New defect detection capabilities are needed. Optical instruments at present wavelengths are not adequate for single-particle defect inspection, and higher resolution instruments do not have the range and throughput needed 54 . Although electron beam techniques are widely used, assessing beam damage for thin structures is difficult.…”

Section: Open Measurement Questionsmentioning

confidence: 99%

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Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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The semiconductor industry continues to produce ever smaller devices that are ever more complex in shape and contain ever more types of materials. The ultimate sizes and functionality of these new devices will be affected by fundamental and engineering limits such as heat dissipation, carrier mobility and fault tolerance thresholds. At present, it is unclear which are the best measurement methods needed to evaluate the nanometre-scale features of such devices and how the fundamental limits will affect the required metrology. Here, we review state-of-the-art dimensional metrology methods for integrated circuits, considering the advantages, limitations and potential improvements of the various approaches. We describe how integrated circuit device design and industry requirements will affect lithography options and consequently metrology requirements. We also discuss potentially powerful emerging technologies and highlight measurement problems that at present have no obvious solution.

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Section: Advanced Metrology Techniquesmentioning

confidence: 99%

Section: Open Measurement Questionsmentioning

confidence: 99%

Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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“…Scanning electron microscopy (SEM) based systems are major inspection and metrology tools to measure critical dimensions (CDs) in nanofabrication because they provide optimal functionality by combining high-resolution with high-speed, and non-destructive imaging (Solecky et al, 2017; Orji et al, 2018). However, information from 3D samples reduces to a gray-scale value in SEM micrographs, where one cannot easily measure the structure height.…”

Section: Introductionmentioning

confidence: 99%

Estimating Step Heights from Top-Down SEM Images

Arat

Bolten

Zonnevylle³

et al. 2019

Microsc Microanal

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Scanning electron microscopy (SEM) is one of the most common inspection methods in the semiconductor industry and in research labs. To extract the height of structures using SEM images, various techniques have been used, such as tilting a sample, or modifying the SEM tool with extra sources and/or detectors. However, none of these techniques focused on extraction of height information directly from top-down images. In this work, using Monte Carlo simulations, we studied the relation between step height and the emission of secondary electrons (SEs) resulting from exposure with primary electrons at different energies. It is found that part of the SE signal, when scanning over a step edge, is determined by the step height rather than the geometry of the step edge. We present a way to quantify this, arriving at a method to determine the height of structures from top-down SEM images. The method is demonstrated on three different samples using two different SEM tools, and atomic force microscopy is used to measure the step height of the samples. The results obtained are in qualitative agreement with the results from the Monte Carlo simulations.

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“…Electron-beam-based metrology is indispensable in the manufacture of integrated circuits (ICs), and drives progress in instrumentation and data analysis. 1 Transmission and scanning electron microscopes (TEMs and SEMs) reveal high-resolution structural and material composition details, perform dimensional measurements, identify and analyze structural defects, test circuits in operation, and provide insights into device behavior and causes of failure. The continuing reduction in device size in the incumbent complementary metal oxide semiconductor (CMOS) technology, the introduction of materials such as III-Vs, Ge, carbon and multiferroics, the increasingly three-dimensional nature of devices, (e.g., FinFETs, Gate-All-Around (GAA) transistors), and architectures, (e.g., 3D cross-point memories), and novel fabrication approaches (e.g., nanoimprint lithography and directed self-assembly) present a new set of metrology requirements (Figure 1), 2–5 and even sample preparation demands.…”

Section: Introductionmentioning

confidence: 99%

“…The current state and future needs of the complementary optical, scanned probe, and electron-beam metrology ecosystem for advanced IC fabrication are detailed by Bunday et al 3 Additionally, entirely new computing paradigms, such as neuromorphic computing, 7 that may permit progress to energy-efficient computation at the Landauer limit 1 of k Tln2 per bit (2.8 × 10 −21 J at 300 K), 2,8,9 drive the exploration of a zoo of new device types. 10 Many of these devices manipulate certain properties – state variables – other than an electronic charge, such as the electric or magnetic dipole, orbital state, or atomic configuration 2 .…”

Section: Introductionmentioning

confidence: 99%

Research Update: Electron beam-based metrology after CMOS

et al. 2018

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The magnitudes of the challenges facing electron-based metrology for post-CMOS technology are reviewed. Directed selfassembly, nanophotonics/plasmonics, and resistive switches and selectors, are examined as exemplars of important post-CMOS technologies. Materials, devices, and architectures emerging from these technologies pose new metrology requirements: defect detection, possibly subsurface, in soft materials, accurate measurement of size, shape, and roughness of structures for nanophotonic devices, contamination-free measurement of surface-sensitive structures, and identification of subtle structural, chemical, or electronic changes of state associated with switching in non-volatile memory elements. Electron-beam techniques are examined in the light of these emerging requirements. The strong electron-matter interaction provides measurable signal from small sample features, rendering electron-beam methods more suitable than most for nanometer-scale metrology, but as is to be expected, solutions to many of the measurement challenges are yet to be demonstrated. The seeds of possible solutions are identified when they are available.

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In-line E-beam metrology and defect inspection: industry reflections, hybrid E-beam opportunities, recommendations and predictions

Cited by 7 publications

References 11 publications

Metrology for the next generation of semiconductor devices

Metrology for the next generation of semiconductor devices

Estimating Step Heights from Top-Down SEM Images

Research Update: Electron beam-based metrology after CMOS

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