Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs

Alam, Syed Asad; Gustafsson, Oscar

doi:10.1109/iscas.2011.5937652

Cited by 4 publications

(7 citation statements)

References 7 publications

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“…This work extends the previous work of the authors as reported in [9]. We proposed an architecture for time-multiplexed periodic model filters and showed it to achieve low resource utilization when compared to vendor provided time-multiplexed FIR cores because these cores were not able to fully utilize the sparsity.…”

Section: Design Methodologysupporting

confidence: 53%

“…We proposed an architecture for time-multiplexed periodic model filters and showed it to achieve low resource utilization when compared to vendor provided time-multiplexed FIR cores because these cores were not able to fully utilize the sparsity. In [9], two architectures were proposed: a non-pipelined and a pipelined one, along with an adjustment for odd filter length. For brevity, we will only describe the pipelined architecture for odd filter lengths.…”

Section: Design Methodologymentioning

confidence: 99%

“…The design methodology for periodic model filter in [9] is as follows: an array of ROMs holds the non-zero coefficients and an array of RAMs is used to store data. The DSP blocks are used to implement the convolution function as well as accumulation as, in general, DSP blocks also can support fast accumulation [10].…”

Section: A Architecture -Periodic Model Filtermentioning

confidence: 99%

“…The authors in [8] compare the impact of different sparsity factors and placement of zeros on FPGA utilization while implementing a 200-order fully parallel FIR filter. Furthermore, the effect of time-multiplexing and sparseness of a periodic model filter was studied in [9].…”

mentioning

confidence: 99%

“…In this work, we extend our previous work in [9] to cover a complete narrow-band FRM filter in comparison to a single stage implementation for the same specification. This comparison includes both resource utilization and power consumption.…”

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confidence: 99%

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Implementation of narrow-band frequency-response masking for efficient narrow transition band FIR filters on FPGAs

Alam

Gustafsson

2011

2011 Norchip

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Abstract-The complexit y of narrow transition band FIR filters is high and can be reduced by using frequency response masking (FRM) techniques. These techniques use a combination of periodic model filters and masking filters. In this paper, we show that time-multiplexed FRM filters achieve lower complexity, not only in terms of multipliers, but also logic clements compared to time-multiplexed single stage filters.The reduced complexity also leads to a lower power consumption.Furthermore, we show that the optimal period of the model filter is dependent on the time-multiplexing factor.

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Section: Design Methodologysupporting

confidence: 53%

Section: Design Methodologymentioning

confidence: 99%

Section: A Architecture -Periodic Model Filtermentioning

confidence: 99%

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confidence: 99%

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confidence: 99%

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Implementation of narrow-band frequency-response masking for efficient narrow transition band FIR filters on FPGAs

Alam

Gustafsson

2011

2011 Norchip

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On the Implementation of Time-Multiplexed Frequency-Response Masking Filters

Alam

Gustafsson

2016

IEEE Trans. Signal Process.

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Techniques for Efficient Implementation of FIR and Particle Filtering

Alam

2016

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Finite-length impulse response (FIR) filters occupy a central place many signal processing applications which either alter the shape, frequency or the sampling frequency of the signal. FIR filters are used because of their stability and possibility to have linear-phase but require a high filter order to achieve the same magnitude specifications as compared to infinite impulse response (IIR) filters. Depending on the size of the required transition bandwidth the filter order can range from tens to hundreds to even thousands. Since the implementation of the filters in digital domain requires multipliers and adders, high filter orders translate to a large number of these arithmetic units for its implementation. Research towards reducing the complexity of FIR filters has been going on for decades and the techniques used can be roughly divided into two categories; reduction in the number of multipliers and simplification of the multiplier implementation.One technique to reduce the number of multipliers is to use cascaded subfilters with lower complexity to achieve the desired specification, known as frequency-response masking (FRM). One of the sub-filters is a upsampled model filter whose band edges are an integer multiple, termed as the period L, of the target filter's band edges. Other sub-filters may include complement and masking filters which filter different parts of the spectrum to achieve the desired response. From an implementation point-of-view, time-multiplexing is beneficial because generally the allowable maximum clock frequency supported by the current state-of-the-art semiconductor technology does not correspond to the application bound sample rate. A combination of these two techniques plays a significant role towards efficient implementation of FIR filters. Part of the work presented in this dissertation is architectures for time-multiplexed FRM filters that benefit from the inherent sparsity of the periodic model filters.These time-multiplexed FRM filters not only reduce the number of multipliers but lowers the memory usage. Although the FRM technique requires a higher number delay elements, it results in fewer memories and more energy efficient memory schemes when time-multiplexed. Different memory arrangements and memory access schemes have also been discussed and compared in terms of their efficiency when using both single and dual-port memories. An efficient v vi Abstract pipelining scheme has been proposed which reduces the number of pipelining registers while achieving similar clock frequencies. The single optimal point where the number of multiplications is minimum for non-time-multiplexed FRM filters is shown to become a function of both the period, L and time-multiplexing factor, M . This means that the minimum number of multipliers does not always correspond to the minimum number of multiplications which also increases the flexibility of implementation. These filters are shown to achieve power reduction between 23% and 68% for the considered examples.To simplify the multiplier, alt...

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Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs

Cited by 4 publications

References 7 publications

Implementation of narrow-band frequency-response masking for efficient narrow transition band FIR filters on FPGAs

Implementation of narrow-band frequency-response masking for efficient narrow transition band FIR filters on FPGAs

On the Implementation of Time-Multiplexed Frequency-Response Masking Filters

Techniques for Efficient Implementation of FIR and Particle Filtering

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