Impact of Temperature and Switching Rate on Properties of Crosstalk on Symmetrical & Asymmetrical Double-trench SiC Power MOSFET

Abstract

In this paper, the properties of crosstalk on SiC planar MOSFET, SiC symmetrical double-trench MOSFET and SiC asymmetrical double-trench MOSFET is investigated on a half-bridge topology, to enable analysis of the impact of temperature, drain-source transition speed and gate resistance on the severity of the shoot-through current and induced gate voltage. The experimental measurements, performed on a wide range of temperatures and switching rates, show that the two selected symmetrical and asymmetrical double-trench MOSFETs exhibit higher induced gate voltage during crosstalk with the same external gate resistance compared with the planar SiC MOSFET, yielding a higher shoot-through current. Therefore, in continuous initiation of intentional crosstalk, the two doubletrench MOSFETs experience more temperature rise, especially for symmetrical one which leads the device to verge of failure within minutes while the temperature rise in other two devices is significantly lower. The different trends of shoot-through current with temperature on DUTs reveals that they are dominated by different mechanisms, i.e., influenced by threshold voltage and inversion layer carriers' mobility. A model is developed for prediction of shoot-through current during crosstalk which is validated for the 3 device structures. The comparison of the modelled results with the measurement proves its capability to predict the crosstalk behaviour.

Crosstalk Induced Shoot-Through in BTI-Stressed Symmetrical & Asymmetrical Double-Trench SiC Power MOSFETs

“…The test circuit is shown in Fig. 6 with its schematic which is a half-bridge [23]. The top switching device is fixed to make a fair comparison for DUTs placed at bottom.…”

Investigation on threshold voltage instability under sweeping and DC gate bias stressing of SiC symmetrical and asymmetrical double-trench MOSFETs

“…In recent publications of threshold voltage stability on SiC MOSFET [5,6,7], the devices studied mainly focuses on the planar MOSFET. However, with the introduction of double-trench structured SiC MOSFET to the market, it has become a competitor to the conventional planar MOSFET as its double-trench structure allows high channel-density design thus enables lower on-state loss and faster switching [8,9]. Three cross-sectional schematics for planar structure, symmetrical and asymmetrical double-trench SiC MOSFETs are shown in Fig.…”

Investigation of Repetitive Short Circuit Stress as a Degradation Metric in Symmetrical and Asymmetrical Double-Trench SiC Power MOSFETs

“…However, none of these studies focus on the degradation of dynamic parameters, and it still lacks a qualitative reliability evaluation among devices with different structures. Thus, this paper aims to conduct repetitive SC tests on planar, symmetrical and asymmetrical SiC MOSFETs to compare their reliability and comprehensively investigate degradation of parameters, which would provide useful information for device selection and technology improvement [8]- [10].…”