Crosstalk Induced Shoot-Through in BTI-Stressed Symmetrical & Asymmetrical Double-Trench SiC Power MOSFETs

Abstract

In this paper, the crosstalk-induced shoot-through current and induced gate voltage of SiC planar MOSFETs, SiC symmetrical double-trench MOSFETs and SiC asymmetrical double-trench MOSFETs is investigated on a half-bridge circuit to analyse the impact of temperature, drain-source voltage switching rate, gate resistance and load current level on crosstalk-induced properties of different SiC MOSFET structures. It shows that due to the smaller gate-source capacitance, the two double-trench MOSFETs exhibit higher induced gate voltage during crosstalk with the same external gate resistance, which together with the higher transconductance, yield higher shoot-through current than the planar MOSFET. Accordingly, their shoot-through current decreases with increasing of the load current while the planar MOSFET exhibits an opposite trend. The different trend of shoot-through current with temperature on DUTs reveals that the crosstalk in different device structures are dominated by different mechanisms, i.e. threshold voltage and channel mobility with the gate-source capacitance influencing the amplitude. Impact of bias temperature instability with positive and negative gate stressing is measured with a range of stress and recover periods at temperateness ranging between 25°C to 175°C. These measurements show that the peak shoot-through correlates with the threshold drift, though with less sensitivity for SiC symmetrical and asymmetrical double-trench MOSFETs compared with the planar SiC MOSFET where the inter-dependence is pronounced. A model is developed for the induced gate voltage and shoot-through current during crosstalk with channel current considered. The comparison of the model results with measurement confirms its capability to predict crosstalk in different MOSFET structures.

Electrothermal Power Cycling to Failure of Discrete Planar, Symmetrical Double-Trench and Asymmetrical Trench SiC MOSFETs

“…Even though these different structured power MOSFETs could have similar ratings as given in the datasheet, their performance would differ under the same operating conditions. It is previously shown that the thermal behaviour of these three different structured MOSFETs are distinct in terms of observed case temperature under repetitive crosstalk events with continuous occurrence of shoot-through in [22]- [24]. The thermal image of each MOSFET structure at its peak case temperature is shown in Fig.…”

Investigation of Repetitive Short Circuit Stress as a Degradation Metric in Symmetrical and Asymmetrical Double-Trench SiC Power MOSFETs

“…The devices under test (DUTs) are Rohm's planar SiC MOSFET, symmetrical SiC MOSFET, and Infineon's asymmetrical SiC MOSFET with same voltage rating and similar current rating. Detailed device parameters are shown in Table 978-1-6654-8814-3/22/$31.00 ©2022 IEEE 1, and the structures of three devices are illustrated in [11]. In repetitive SC events, the DUTs are tested at room temperature.…”

Investigation on threshold voltage instability under sweeping and DC gate bias stressing of SiC symmetrical and asymmetrical double-trench MOSFETs

“…Since electrons would be released from interface traps in negative gate stressing, this would increase the carrier-carrier scattering level which is the main mechanism that leads to carrier mobility degradation. This inturn impacts the severity of potential crosstalk [17,18] as well. Fig.…”