Impact of NBTI Induced Statistical Variation to SRAM Cell Stability

Abstract

This work investigates the impact of Negative Bias Temperature Instability (NBTI) on the SRAM cell stability. As proposed by C. Wang et al. [1], the stability of an SRAM cell can be determined by the peak current (I CRIT ) of the "N Curve". In our experiments a typical NBTI stress was applied to one of the two pull up transistors part of an SRAM cell designed by using an advanced submicron CMOS technology. Both the mean and variance of the pMOSFET threshold voltage shift in saturation (ΔVt SAT ) and the corresponding values of the I CRIT shifts (ΔI CRIT ) were measured. An experimental correlation between the means and the variances of both parameters shifts was established and found consistent with the predicted simulated values in the case of I CRIT is degrading by only NBTI aging of the one or both pull up transistors. These results allow us to observe the direct impact of the NBTI shift of a pMOSFET transistor in a SRAM cell and the corresponding reduction to the Static Noise Margin. In addition we propose, for the first time, a methodology to define a pMOSFET device NBTI target directly related to the SRAM cell stability and its dependence on SRAM design and the adopted CMOS technology. It is found that a more appropriate SRAM stability sensitive pMOSFET NBTI Vt SAT target cannot be limited to the Vt SAT mean shift, but needs as well a quantification of the allowed variance and initial SRAM I CRIT distribution.

Statistical prediction of circuit aging under process variations

“…The mismatch between neighboring transistors reduces the cell Static Noise Margin (SNM) (Krishnan et al, 2006;Lin et al, 2006;Rosa et al, 2006). The impact of statistical variations on SRAM SNM is mainly divided into Read, Write, and Hold stability.…”

“…www.intechopen.com A few works have been published in the literature to estimate the statistical variations in temporal NBTI degradation (Rauch, 2002;2007;Rosa et al, 2006;Kang et al, 2007). Their assumption is the number of broken bonds in the channel is a Poisson random variable, and correspondingly V th follows the Poisson distribution.…”

Improving SRAM Vmin and yield by using variation-aware BTI stress

“…We do not consider BTI induced ∆V T variance, which has been shown to relate to the mean of BTIinduced ∆V T and gate area for NBTI [3]. More accurate analysis requires accurate BTI models.…”

Consideration of recovery effects during NBTI measurements for accurate lifetime predictions of state-of-the-art pMOSFETs

“…NBTI is nowadays the most critical device degradation mechanism and became a limiting factor in scaling of modern CMOS technologies [1][2][3][4][5][6]. Although the shrink of gate oxide thickness is almost stopped at current technologies under development, the NBTI challenge will increase furthermore.…”