Impact of electrostatics and doping concentration on the performance of silicon tunnel field-effect transistors

Sandow, C.; Knoch, J.; Urban, Christoph; Zhao, Qing‐Tai; Mantl, S.

doi:10.1016/j.sse.2009.05.009

Cited by 116 publications

(43 citation statements)

References 17 publications

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“…Note, that the fabrication scheme is suitable for a combination of optical and electron-beam lithography enabling a further downscaling of the gate length. However, we are mostly interested in studying nanoobjects in a TFET configuration, and it was shown that the performance of TFETs is, to a large extent, independent of the channel length [9]. Thus, different gate (i.e., channel) lengths were only realized to enable the investigation of nanoobjects of different geometrical size.…”

Section: Buried Triple-gate Structurementioning

confidence: 99%

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Buried triple-gate structures for advanced field-effect transistor devices

Müller

Gumprich

Schütte

et al. 2014

Microelectronic Engineering

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Section: Buried Triple-gate Structurementioning

confidence: 99%

“…], ''semiconductor nanowires, carbon nanotubes, graphene or others may be needed'' [2]. In addition, novel device principles, such as the Tunnel FET (TFET), become more interesting especially for low power applications [3][4][5][6][7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Buried triple-gate structures for advanced field-effect transistor devices

Müller

Gumprich

Schütte

et al. 2014

Microelectronic Engineering

Self Cite

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“…Sandow et al, [12] proposed experimental studies on the performance of ultrathin body SOI tunnel FETs depending on channel length, gate oxide thickness and source/drain doping concentrations. By reducing the gate oxide thickness from 4.5 nm to 3.5 nm leads to increase the maximum saturation current by a factor of 6.…”

Section: Introductionmentioning

confidence: 99%

Analytical Surface Potential Model with TCAD Simulation Verification for Evaluation of Surrounding Gate TFET

Samuel¹,

Balamurugan²,

T.Niranjana³

et al. 2014

Journal of Electrical Engineering and Technology

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-In this paper, a new two dimensional (2D) analytical modeling and simulation for a surrounding gate tunnel field effect transistor (TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunneling generation rate and thus we numerically extract the tunneling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.

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“…Certainly, such mechanism highly restricts the efficiency of the device. Pseudo-bipolar behaviour [3 -8], weak channel control, the degradation of electrical characteristics such as the leakage-current increase, and subthreshold oscillations are observed in such devices, especially in the transistors consisting of nanotubes with larger diameters [9,10]. It is also experimentally proved that in order to decrease the drain induced barrier (DIBL) to an acceptable value, reducing the transistor dimensions must follow specific rules [9] (for example, the ratio of the channel length to the oxide thickness must be more than 18).…”

Section: Introductionmentioning

confidence: 99%

A New Approach to the Characteristics and Short-Channel Effects of Double-Gate Carbon Nanotube Field-Effect Transistors using MATLAB: A Numerical Study

Heidari¹,

Heidari²,

Jahromi³

et al. 2012

Zeitschrift Für Naturforschung A

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In this paper, first, the impact of different gate arrangements on the short-channel effects of carbon nanotube field-effect transistors with doped source and drain with the self-consistent solution of the three-dimensional Poisson equation and the Schrödinger equation with open boundary conditions, within the non-equilibrium Green function, is investigated. The results indicate that the double-gate structure possesses a quasi-ideal subthreshold oscillation and an acceptable decrease in the drain induced barrier even for a relatively thick gate oxide (5 nm). Afterward, the electrical characteristics of the double-gate carbon nanotube field-effect transistors (DG-CNTFET) are investigated. The results demonstrate that an increase in diameter and density of the nanotubes in the DG-CNTFET increases the on-state current. Also, as the drain voltage increases, the off-state current of the DG-CNTFET decreases. In addition, regarding the negative gate voltages, for a high drain voltage, increasing in the drain current due to band-to-band tunnelling requires a larger negative gate voltage, and for a low drain voltage, resonant states appear.

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Impact of electrostatics and doping concentration on the performance of silicon tunnel field-effect transistors

Cited by 116 publications

References 17 publications

Buried triple-gate structures for advanced field-effect transistor devices

Buried triple-gate structures for advanced field-effect transistor devices

Analytical Surface Potential Model with TCAD Simulation Verification for Evaluation of Surrounding Gate TFET

A New Approach to the Characteristics and Short-Channel Effects of Double-Gate Carbon Nanotube Field-Effect Transistors using MATLAB: A Numerical Study

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