Buried triple-gate structures for advanced field-effect transistor devices

Müller, Marcel; Gumprich, A.; Schütte, F.; Kallis, K. T.; Künzelmann, U.; Engels, Stephan; Stampfer, Christoph; Wilck, N.; Knoch, J.

doi:10.1016/j.mee.2014.02.001

Cited by 11 publications

(13 citation statements)

References 24 publications

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“…In addition, it exhibits a smaller band gap and lower effective masses compared to MoS 2 , both known to improve the performance of TFETs [13–16, 21]. The electrostatic doping is realized by a modified version of our previously employed buried triple-gate (BTG) structure [31]. This structure features three independently controllable gates: one center-gate and two side-gates for electrostatic doping.…”

Section: Introductionmentioning

confidence: 99%

Gate-Controlled WSe2 Transistors Using a Buried Triple-Gate Structure

et al. 2016

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In the present paper, we show tungsten diselenide (WSe2) devices that can be tuned to operate as n-type and p-type field-effect transistors (FETs) as well as band-to-band tunnel transistors on the same flake. Source, channel, and drain areas of the WSe2 flake are adjusted, using buried triple-gate substrates with three independently controllable gates. The device characteristics found in the tunnel transistor configuration are determined by the particular geometry of the buried triple-gate structure, consistent with a simple estimation of the expected off-state behavior.

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Section: Introductionmentioning

confidence: 99%

Gate-Controlled WSe2 Transistors Using a Buried Triple-Gate Structure

et al. 2016

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“…In the case of (a) a rather thick GSG insulation of approximately 90 nm is visible. In addition, an excellent topography of the aluminum gate, with a dishing of only ∼1 nm per micron gate‐length, and quality (only few pits and scratches, roughness down to 1 nm root mean square) of the polished aluminum has been achieved . The meander pattern of the triple‐gates on the BTG substrates allows a random deposition of nanostructures on top of the BTG surface.…”

Section: Transistors Based On Multigate Structuresmentioning

confidence: 98%

“…The fabrication of the BTG substrates is carried out on 4” silicon‐on‐insulator (SOI) wafers with a top‐layer of 340 nm (100) Si and a 400 nm buried oxide (BOX) . First, the silicon is degenerately doped by implanting phosphorous at 75keV with a dose of 10 15 cm −2 and 7.5° tilt.…”

Section: Transistors Based On Multigate Structuresmentioning

confidence: 99%

Investigations on Field‐Effect Transistors Based on Two‐Dimensional Materials

et al. 2017

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In the present article, experimental and theoretical investigations regarding field-effect transistors based on two-dimensional (2D) materials are presented. First, the properties of contacts between a metal and 2D material are discussed. To this end, metal-to-graphene contacts as well to transition metal dichalcogenides (TMD) are studied. Whereas metal-graphene contacts can be tuned with an appropriate back-gate, metal-TMD contacts exhibit strong Fermi level pinning showing substantially limited maximum possible drive current. Next, tungsten diselenide (WSe 2 ) field-effect transistors are presented. Employing buried-triple-gate substrates allows tuning source, channel and drain by applying appropriate gate voltages so that the device can be reconfigured to work as n-type, p-type and as so-called band-to-band tunnel field-effect transistor on the same WSe 2 flake.

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“…Such buried‐triple gate (BTG) substrates are particularly advantageous when investigating alternative materials to silicon such as carbon nanotubes or transition metal dichalcogenides (TMDs) because BTGs offer an entirely flat surface and repeated gate structures that provide the same electrostatic environment for number of different devices. As such, they can serve as a platform for studying various kinds of novel materials and facilitate quick and easy processing of devices …”

Section: Electrostatic Doping Of Field‐effect Transistorsmentioning

confidence: 99%

“…Subsequently, chemical‐mechanical polishing (CMP) is used to remove the Al overburden yielding a flat surface on which Al 2 O 3 is deposited with atomic layer deposition to form a gate dielectric; for details on the processing see Ref. . The final steps involve the deposition of a nanostructure on top of the BTG substrate and the fabrication of source/drain leads: WSe 2 field‐effect transistors were fabricated by depositing a WSe 2 ‐flake on top of the BTG substrates using the scotch‐tape method and nickel source/drain contacts with electron beam lithography and lift‐off.…”

Section: Electrostatic Doping Of Field‐effect Transistorsmentioning

confidence: 99%

Alternatives for Doping in Nanoscale Field‐Effect Transistors

Riederer

Grap

Fischer

et al. 2018

Physica Status Solidi (a)

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In the present article, alternatives to impurity doping in nanoscale field‐effect transistors (FETs) are investigated. The discussion is based on conventional and tunnel FETs. The impact of dopant deactivation due to dielectric mismatch or quantization, random dopant effects, and the degeneracy level on the performance is discussed. As alternatives metal‐semiconductor‐contacts, gate‐controlled doping and an interface engineering approach are studied. One of the main requirements for proper device functionality is the existence of a band gap in the contacts. Thus, metal‐semiconductor contacts are less suited since they lead to ambipolar operation with increased leakage and to a deteriorated on‐state performance. With gate‐controlled doping, electrodes areused to create doped regions leaving behind a pristine band gap. Moreover, it enables reconfigurable devices with nFET, pFET and tunnel FET operation. Furthermore, with multiple nanoscale gates, electrostatic doping allows manipulating the potential within the device on the nanoscale. Experimental demonstrations of such devices with triple‐gates and multiple gate structures are presented. Finally, the interface engineering approach allows combining a metallic contact electrode with an almost unmodified band gap in the source/drain contacts by adjusting an ultrathin insulator in‐between metal and semiconductor yielding quasi‐doped contacts whose polarity depends on the work function of contact metal.

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Buried triple-gate structures for advanced field-effect transistor devices

Cited by 11 publications

References 24 publications

Gate-Controlled WSe2 Transistors Using a Buried Triple-Gate Structure

Gate-Controlled WSe2 Transistors Using a Buried Triple-Gate Structure

Investigations on Field‐Effect Transistors Based on Two‐Dimensional Materials

Alternatives for Doping in Nanoscale Field‐Effect Transistors

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