Impact of Design on High-Frequency Performance of Advanced MIM Capacitors Using Si$_{3}$N$_{4}$ Dielectric Layers

Piquet, J.; Bermond, C.; Thomas, M.; Farcy, A.; Lacrevaz, T.; Blampey, B.; Torrès, J.; Flechet, B.; Angénieux, G.

doi:10.1109/tcapt.2008.2001128

Cited by 3 publications

(1 citation statement)

References 12 publications

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“…Applications using MIM capacitors include analog-to-digital converters (ADC), analog noise filters, DC voltage decoupling, electrostatic discharge (ESD) protection, and dynamic random-access memory (DRAM). [431][432][433] Initially analog and mixed signal (AMS) ICs used metal-insulator-silicon (MIS) capacitors, but these were quickly replaced by polysilicon-oxide-polysilicon (doublepoly) capacitors for their improved voltage nonlinearity. 434,435 Doublepoly capacitors were subsequently replaced by MIM capacitors due to the shift into multi-gigahertz frequencies.…”

Section: Metal-insulator-metal Capacitors With High-κ Insulatorsmentioning

confidence: 99%

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

Jenkins

Austin

Conley

et al. 2019

ECS J. Solid State Sci. Technol.

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High-dielectric constant (high-k) gate oxides and low-dielectric constant (low-k) interlayer dielectrics (ILD) have dominated the nanoelectronic materials research scene over the past two decades, but they have recently reached a state of maturity and perhaps the limits of their scaling. Based on this, there is a need for a systematic review summarizing not only the historic research and achievements on high-k and low-k dielectrics, but also emerging device applications as well as an outlook of future challenges. We begin by first reviewing the factors that drove the emergence of low-k and high-k materials in nanoelectronics as ILD and gate dielectric materials, respectively, and the challenges and limits these materials ultimately approached in terms of permittivity scaling. We then illustrate that gate dielectric and ILD applications represent just a small fraction of the numerous dielectrics utilized in present day nanoelectronic products where permittivity scaling is now being increasingly demanded for materials such as dielectric spacers, trench isolation, and etch stopping layers. We conclude by examining the numerous new applications for dielectric materials that are emerging as the semiconductor industry transitions to novel patterning schemes, prepares for life post CMOS scaling, and explores ways to natively embed device functionality in the metal interconnect. For the former, we specifically examine the “colorful” requirements for the various enabling dielectric hardmask and spacer materials utilized in pitch division-multi-pattern processes and then discuss the role that selective area deposition of dielectrics and metals could play in reducing the complexity of such patterning processes. For the latter, we review the use of both high-k and low-k dielectrics in various metal-insulator-metal (MIM) structures as Fermi level de-pinning layers, tunnel diodes, and back-end-of-line (BEOL) compatible capacitive and resistive switching random access memory (ReRAM) elements. We further examine how dielectrics can hinder or aid new forms of computing such as quantum and neuromorphic in reaching their full potential. In conclusion, we find that while the field of dielectrics has a long history, it remains vibrant with numerous exciting new and old research vectors awaiting further exploration.

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Section: Metal-insulator-metal Capacitors With High-κ Insulatorsmentioning

confidence: 99%

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

Jenkins

Austin

Conley

et al. 2019

ECS J. Solid State Sci. Technol.

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Dielectric breakdown of oxide films in electronic devices

Padovani,

La Torraca,

Strand

et al. 2024

Nat Rev Mater

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Design and simulation of a lumped element metal finger capacitor for RF-CMOS power splitters

Uddin

Nordin

Ibrahimy

et al. 2010

2010 IEEE Asia Pacific Conference on Circuits and Systems

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Design, development and simulation results of an interdigitated metal-fingers capacitors in 0.18f./,m RF-CMOS technology that are exploiting both lateral and vertical metal metal capacitances are presented. Two RF-CMOS capacitors are designed specifically for applications in a 2.45 GHz power splitter circuit. Five metal RF-CMOS layers are used to design two capacitors of 1.39pF and 2.2pF, consisting of 101 and 105 metal fingers respectively. The real impedance obtained at the input is Zl = 35.04r2 and Z2 = 39.73r2, while the insertion loss is 821 = 2.47dB. Return loss 811 and 822 are simulated as 4.042dB and 4.047dB respectively. Phase measurements of 110.9° and 101.20 are obtained for the input and output ports, indicating that the phase shift is not degraded too much due to the capacitor.

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Impact of Design on High-Frequency Performance of Advanced MIM Capacitors Using Si$_{3}$N$_{4}$ Dielectric Layers

Cited by 3 publications

References 12 publications

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices

Dielectric breakdown of oxide films in electronic devices

Design and simulation of a lumped element metal finger capacitor for RF-CMOS power splitters

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