HiSIM: a MOSFET model for circuit simulation connecting circuit performance with technology

Miura-Mattausch, Mitiko; Ueno, Hideki; Tanaka, Masayasu; Mattausch, H. J.; Kumashiro, S.; Yamaguchi, Tatsuya; Yamashita, K.; Nakayama, Noriaki

doi:10.1109/iedm.2002.1175790

Cited by 28 publications

(11 citation statements)

References 1 publication

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“…A similar formulation can also be given for pchannel poly-Si TFTs. In our model, an iterative solution of the SP is utilized in order to obtain the drain current, just as for the SP-based c-Si MOSFET model, HiSIM [7]. To describe the poly-Si TFTs, we have taken into account the influence of trap states across the band gap for calculation of the SPs.…”

Section: Surface Potential Based Drain Current Modelmentioning

confidence: 99%

A New Surface Potential Based Poly-Si TFT Model for Circuit Simulation

Tsuji

Kuzuoka

Kishida

et al. 2006

2006 International Electron Devices Meeting

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A new surface potential based poly-Si TFT model for circuit simulation was developed, accounting for the influence of both deep and tail states across the band gap. The model describes the drain current for all regions of operation using the unified equation. Calculations using the drain current model produce results that are in good agreement with the measured I-V characteristics of poly-Si TFTs.

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Section: Surface Potential Based Drain Current Modelmentioning

confidence: 99%

A New Surface Potential Based Poly-Si TFT Model for Circuit Simulation

Tsuji

Kuzuoka

Kishida

et al. 2006

2006 International Electron Devices Meeting

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“…Calculated surface potentials are shown in Fig. 2 [9,10]. The other is implemented in a model called PSP and approximates the surface potential by mathematical functions with applied voltages as variables [11,12].…”

Section: A Surface-potential Based Modelmentioning

confidence: 99%

MOSFET Modeling Beyond 100nm Technology: Challenges and Perspectives

Miura-Mattausch

2005

2005 International Conference on Simulation of Semiconductor Processes and Devices

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Evolution of compact models is reviewed. The development trend leads to models based on the channel surface potential, allowing higher accuracy and a reduced numbers of model parameters. It is demonstrated that the model accuracy for higher-order phenomena, which is prerequisite for accurate RF circuit simulation, can be achieved without any new model parameters in addition to those for describing the I-V characteristics. Remaining problems to be solved are also discussed.

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“…For both bulk and SOI CMOS technologies, the reduction of the power supply voltage to about 1V means that the moderate inversion region becomes fractionally larger part of the overall voltage swing and needs to be modeled accurately using either inversion charge based [4], [5] or surface potential based [6]- [9] compact models. The latter are also capable of a physicsbased description of accumulation region behavior and overlap capacitances, which is important for accurate modeling of the performance of advanced CMOS circuit.…”

Section: Introductionmentioning

confidence: 99%

PSP-SOI: A Surface Potential Based Compact Model of Partially Depleted SOI MOSFETs

Gildenblat

et al. 2007

2007 IEEE Custom Integrated Circuits Conference

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This paper reports recent progress on partially depleted (PD) SOI modeling using a surface potential based approach. The new model, called PSP-SOI, is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by including a floating body simulation capability, a parasitic bipolar model, and self-heating. A nonlinear body resistance is included for modeling body-contacted SOI devices. The PSP-SOI model has been extensively tested on several PD/SOI technologies.

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HiSIM: a MOSFET model for circuit simulation connecting circuit performance with technology

Cited by 28 publications

References 1 publication

A New Surface Potential Based Poly-Si TFT Model for Circuit Simulation

A New Surface Potential Based Poly-Si TFT Model for Circuit Simulation

MOSFET Modeling Beyond 100nm Technology: Challenges and Perspectives

PSP-SOI: A Surface Potential Based Compact Model of Partially Depleted SOI MOSFETs

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